What is an FPGA? How does it work?

05/03/2019, hardwarebee

This is a guest post by Jose Soares Augusto, Instructor of courses on circuits and electronics for almost 30 years.


I usually introduce the FPGA (Field-Programmable Gate Array) by saying it is like a Lego box, filled with many instances of several types of blocks. Instead of Lego blocks, the FPGA contains modular digital circuits comprising a few of both combinational (e.g. logic gates, multiplexers) and sequential components (e.g. flip-flops).


Lego blocks allow us to build many, many, different objects (houses, cars, bridges, planes, etc…). The FPGA can be used to build almost any digital circuit — provided the selected FPGA part has enough resources (blocks and speed) to implement that circuit.


So, the FPGA is the more popular reconfigurable circuit.


The FPGA cost goes from a few USD, to more than a thousand USD, depending on the model you need to your design.


Below is a picture of a typical, very simple, classical FPGA.


As you can see, the main blocks on the FPGA are Logic Blocks and I/O Blocks(input/output). But the vast majority of blocks in the FPGA are Logic Blocks, as can be inferred from the figure.


Besides the blocks, there are bunches of metal lines inside the FPGA, usually running along two orthogonal directions — vertical and horizontal. These are called the Programmable Interconnections. In the crossroads of the vertical and the horizontal lines, there are bunches of switches (the gray square in the Programmable Interconnect zoom, shown in the previous figure, represents one of them) implemented with MOSFET transistors, which connect, in a programmed way, the orthogonal lines according to the digital circuit (project) we are deploying in the FPGA.


The Logic Blocks, called CLBs (Configurable Logic Blocks) by some FPGA vendors (namely Xilinx), vary in architecture according to the FPGA’s vendor and family. Below is a typical, yet simple, CLB.


This CLB contains two 3-input LUTs (Look-Up Tables), which in reality are two small 8-bit RAMs, usually used to emulate any 3-input combinational (or combinatorial) function. Combining the two 3-input LUTs with a two-input MUX (multiplexer), we can implement any 4-input combinational function. This CLB also has a full-adder cell (FA), some MUXes and a type-D flip-flop (DFF). So, this CLB can be a part of either combinational or sequential digital complex (with many gates and flip-flops) circuits.


Another important FPGA vendor, the former Altera (now Intel-FPGA, because Intel bought Altera a few months ago), calls Logic Elements (LEs) to their logic blocks. Below is a LE from its Cyclone II family, a block somewhat similar to the CLB from Xilinx (which was shown in the previous picture).


To reconfigure (or “program”) the FPGA, we usually describe the digital circuit we wish to implement in the FPGA using the Verilog or VHDL hardware description languages (HDLs). This description is “compiled” (what is usually called hardware compilation) to a stream of bits which is downloaded, through an FPGA pin, to a register chain inside the FPGA. This register chain traverses all the programmable registers in the FPGA: LUTs, MUXes and FFDs in the logic blocks, MOSFET switches in the programmable interconnects, and eventually other internal registers (i.e., for instance, registers in the I/O blocks).


Below is an image of the Quartus II IDE (Integrated Development Environment) from Altera (or Intel-FPGA), where a digital circuit, described as a Verilog module, is shown. It is a simple decoder/demultiplexer, if the comments in the figure are true :-)


In fact it consists of only five interconnected AND gates.


The IDE from Xilinx has a very similar aspect. Below is an image of the ISE software from Xilinx.


In fact, if you learn to work with one of these tools, it is quite straightforward to extend your skills to the tools from other vendors, given that they are quite similar.


Recall that after you have finished describing your project in one of these design tools, by defining Verilog or VHDL modules (or entities), or even by drawing the circuit schematics, which is also allowed in most of the tools, you compile your design to a bit-file conforming with the FPGA model where you want to deploy your project. This bit file is then downloaded to the FPGA, and then you can connect other devices and signals to the FPGA (clocks, enables, etc…) and test your design observing its behavior with oscilloscopes and digital signal analyzers.


It is important to note that the tools also provide for simulation of your design. So, before testing the hardware, you should simulate your design to perform its verification. Only after this step is done with success you should proceed to hardware testing (which is almost always more costly and uses quite more engineer’s time, when compared to simulation).


There are several variations of the aforementioned typical FPGA. I shall mention a few of them.


For instance, there are mixed-signal FPGAs, that is, FPGA-like chips which have some standard digital reconfigurable blocks but have, as well, some “limited number” of reconfigurable analog blocks. The one shown below, from Microsemi (formerly Actel) is one example: it has some comparators, ADCs and DACs which can be linked in several ways. This particular device also has an embedded processor (ARM Cortex-M3). So, it is a quite versatile chip.


Nowadays there are several examples of devices combining, in the same chip, a standard (micro)processor and a FPGA. One popular example is the Zynq from Xilinx. Below is a diagram of the Zynq-7000 architecture.


As you can see, there is a subsystem consisting of a processor (from the ARM family), several I/O interfaces, and an FPGA fabric (yellow part of the diagram) consisting of the usual FPGA blocks. In complex FPGAs, such as these one, besides the three basic FPGA blocks (logic blocks, I/O blocks and programmable interconnects), one can find more complex blocks, such as DSPs (Digital Signal Processing blocks) and large RAM (Random Access Memory) blocks.




An FPGA can be seen as a “bag” of blocks which implement simple digital functionality (gates, flip-flops, multiplexers…) or, in more complex and expensive FPGAs, which implement high-level digital functions such as digital signal processing blocks. Inside the FPGA there is also an infrastructure of programmable interconnections which are used to link the FPGA blocks in order to “build” the proposed digital project. The circuit designer describes his/hers project in Verilog or VHDL most of the times, using the tools of the FPGA vendor (often provided without cost) and that circuit description is “hardware compiled” to a bit file consisting of the bitstream which is downloaded to the FPGA internals (in fact, to a long internal shift-register) . “Et voila”, you have your digital circuit built in a fashion similar to a Lego construction :-)


Last note: good (or less good…) FPGA designers usually find jobs easily and quickly!


Disclaimer: I don’t have any kind of relation with FPGA providers; there are several more companies providing FPGAs, besides those I mentioned in this answer.