Movellus has made a significant breakthrough in the industry by introducing the first on-chip sensor designed for power delivery network (PDN) characterization and monitoring. This innovation is crucial for ensuring power integrity in system-on-chip (SoC) designs, especially in high-power AI chips and chiplets. The Aeonic Insight PDN IQ sensor offers nanosecond resolution of the power network and can be strategically placed in approximately ten to 20 locations where data is needed. These sensors are programmable with a 512-deep buffer, enabling trigger data transmission via the JTAG network or the APB bus.
Building upon the success of the Aeonic voltage regulator IP launched last year, Movellus aims to address the growing challenges associated with power delivery in complex chips. Vikram Karvat, the chief operating officer at Movellus, emphasizes the importance of optimizing power efficiency, stating, “Everything now is coming down to tokens per joule because we are hitting the wall on power delivery.” The need for enhanced visibility at the voltage regulator level highlights the necessity for more precise power measurement as integration levels increase, requiring nanosecond-level accuracy to effectively manage voltage curves.
One of the key advantages of the Aeonic Insight PDN IQ sensor is its versatility in characterizing power performance during chip development and production testing. These sensors can also be utilized for in-field testing, particularly in AI data centers, where the performance of individual nodes can significantly impact the overall cluster operation. The ability to monitor the power delivery network beyond the on-chip components, including voltage regulators and test boards, provides a comprehensive view of power behavior under varying workloads.
As Movellus continues to innovate in the digital IP space, the integration of the Aeonic Insight PDN IQ sensor into chip designs offers a scalable solution for monitoring power delivery networks. With the potential for tens of sensors to be deployed in strategic locations within a chip, the flexibility of this digital IP enables seamless integration with clock planes, allowing for high-speed sampling at frequencies up to 1GHz. This level of granularity in power monitoring is essential for optimizing performance and efficiency in modern chip designs.
Looking ahead, the deployment of chips utilizing the Aeonic Insight PDN IQ sensor is anticipated by 2027. Movellus is not only focused on hardware innovation but also on developing software APIs and libraries that will simplify the integration of sensor data into existing tools and analytics platforms. By enabling silicon teams to leverage telemetry data from the sensors for deeper insights into PDN behavior, Movellus is paving the way for more efficient and reliable power management strategies in future chip designs.