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MEMS Nanocapacitors Pave the Way for 6G in Upper 5G Bands

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July 18, 2024

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Nanusens, a pioneering company based in the UK, has made a significant breakthrough in the realm of 6G technology. Leveraging their innovative CMOS-based MEMS technology, Nanusens has developed a cutting-edge RF front end that incorporates nanocapacitors on a chip. This revolutionary approach marks a major advancement in the field of telecommunications.

By utilizing their patented MEMS technology, Nanusens has successfully integrated digitally tunable nanoscale capacitors within the CMOS layers of a chip, alongside the necessary control circuitry. These RF Digitally Tunable Capacitors (DTCs) have been specifically designed to address the growing power consumption challenges faced by current antenna systems in the higher frequency bands required for 6G networks.

The key to the success of Nanusens' technology lies in the exceptional quality factor (Q factor) of above 100 at 1GHz. Importantly, this high Q factor is maintained even in the higher frequency bands, ensuring minimal power losses. As a result, users can expect an increase in range of approximately 14% or more, leading to improved connectivity and a better overall user experience.

Moreover, the enhanced linearity of 90 dBc for IMD3 meets the stringent requirements of 5G technology. The power efficiency of the nano-capacitors translates to up to 30% longer talk times, effectively addressing the efficiency challenges faced by current systems.

One of the key advantages of Nanusens' approach is the ability to integrate the DTC seamlessly with other RF front end components on the same chip, including power amplifiers, low noise amplifiers, and transceivers. This integration not only reduces interconnect parasitics but also enables reconfigurability, leading to more efficient and compact solutions compared to traditional multi-component approaches.

The nanocapacitors are meticulously crafted using a process where the Inter Metal Dielectric (IMD) is etched away through pad openings in the passivation layer, creating nano-structures using vapour HF (vHF). The resulting design, combined with standard CMOS processes, ensures high yields and compatibility with active circuitry integration, making production fab-independent.

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