Tiling process mounts InP optical devices on 300mm substrate

Oki Electric Industry in Japan has leveraged its crystal film bonding (CFB) technology to achieve the mounting of optical components from 50mm wafers onto larger 300mm silicon wafers. This innovative Tiling CFB approach facilitates the heterogeneous integration of small-diameter optical semiconductor wafers onto mainstream 300 mm silicon wafers, enabling the high-volume production of chips featuring high-speed photonic interfaces. Oki highlights that this capability was previously unattainable on large wafers, and the company is collaborating with partners and the Nishiyama Laboratory at the Institute of Science in Tokyo to advance commercialization efforts.

With the rise of artificial intelligence (AI), there is a growing demand for high-speed chip-to-chip links with low power consumption, making photonics a key focus area. Optical semiconductor wafers like InP (indium phosphide) wafers are typically smaller, ranging from 50 mm (2in) to 100 mm (4in), due to challenges in achieving epitaxial growth. Moreover, silicon optical waveguides necessitate precise nanoscale roughness control, requiring heterogeneous integration processes that prevent damage.

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The CFB technology, initially developed by OKI for its printers, has been adapted for the tiling approach to address the discrepancy in wafer sizes. This method involves 52 repeated tiling operations across the entire surface of a 300 mm silicon wafer using a single 50mm InP wafer, allowing for the efficient utilization of InP-based materials within a mere 10-minute timeframe.

Notably, the InP wafer can be reused in its original state post-transfer, promoting material recycling and reuse to alleviate environmental impact. The placement accuracy stands at approximately ±1 μm, with an angular accuracy of ±0.005°. This exceptional precision, coupled with OKI’s proprietary 3D intersecting waveguide silicon photonics technology, facilitates high-efficiency optical coupling between optical semiconductors and silicon waveguides, even with a misalignment of around ±3 μm.

In a practical demonstration, a sacrificial layer and InP-based Crystal Films, serving as optical semiconductors, were epitaxially grown on a 50mm InP wafer and subsequently separated into individual elements. Protective and support structures were then established on each element to enable successful batch transfer of the InP-based Crystal Films to an intermediate transfer substrate without erosion.

Batch transfer to an intermediate substrate is crucial for safeguarding the silicon wafer from damage during subsequent removal processes. By ensuring that the InP-based Crystal Films maintain adhesion and are easily transferred during the process, the technology streamlines the efficient tiling of Crystal Films, allowing for effective material utilization without wastage.

The versatility of this technology extends to potential adaptations for use with 75mm and 100mm InP wafers and 200mm silicon wafers. Furthermore, its application with existing optical semiconductor products can enhance heat dissipation substrates and productivity by enabling the utilization of larger wafer sizes.