SiFive and IAR Strengthen RISC-V Automotive Toolchain

SiFive and IAR have expanded their long-standing collaboration to deliver full commercial toolchain support for SiFive’s automotive-focused RISC-V processor IP. According to IAR, the move brings IAR’s Embedded Workbench for RISC-V into full alignment with SiFive’s Automotive IP portfolio, targeting safety-critical vehicle electronics.

For eeNews Europe readers working on automotive SoCs, ADAS, or next-generation vehicle architectures, the announcement highlights how the RISC-V ecosystem is maturing into a viable, certified alternative to proprietary processor architectures, complete with industrial-grade tools and functional safety credentials.

With the latest v3.40.2 release of IAR Embedded Workbench for RISC-V, IAR notes that it has expanded support beyond SiFive’s E6-A series to include the Essential E7-A and S7-A automotive cores. This provides developers with a unified, production-ready toolchain for both 32-bit and 64-bit RISC-V designs used in automotive systems.

As the company indicates, IAR Embedded Workbench is widely used in safety-critical embedded development and combines a high-performance compiler, debugger, and static analysis tools in a single environment. Optimized for RISC-V, the toolchain supports compliance with MISRA C/C++ and other software quality standards, which enables engineering teams to improve robustness and reduce risk early in development.

According to the company, the toolchain is compliant with ISO 26262 and other automotive standards, making it suitable for certified development flows in applications such as intelligent driving systems, digital cockpits, and more.

As part of the wider IAR embedded development platform, the company notes that the toolchain integrates with modern software workflows, including CI/CD pipelines, cloud-based licensing, and automated testing and debugging. This supports scalable development across distributed teams working on complex, safety-critical automotive programs.

On the silicon side, SiFive’s automotive RISC-V IP has achieved functional safety and cybersecurity certifications across its 32-bit E Series and 64-bit S Series cores, the company indicates. The E6-A series targets real-time and safety-critical workloads, including ADAS. New Essential E7-AD and E7-AS cores remain 32-bit but deliver up to 30% higher performance compared with E6 devices. For more demanding systems, the 64-bit S7-AD core addresses high-performance functional safety requirements in domain controllers and similar architectures.

“We have been deeply engaged in the RISC-V ecosystem since its early stages, and our long-term collaboration with SiFive reflects that commitment. As RISC-V adoption expands in automotive, the latest IAR tools now fully support SiFive’s Automotive IP. Together, we empower customers to leverage high-performance RISC-V cores in intelligent driving, digital cockpit, and other safety-critical systems with reliable toolchain support and safety assurance,” said Thomas Andersson, Chief Product Officer at IAR, in a release.

“As the company founded by the inventors of RISC-V, SiFive is driving rapid RISC-V adoption across industries, including automotive. We delivered our first automotive products in 2022 and all three series are now broadly adopted by commercial customers. IAR’s comprehensive support for SiFive Essential Cores and Automotive IP accelerates integration for emerging automotive applications,” John Ronco, Senior Vice President of Products at SiFive, noted in the release.

By combining safety-certified RISC-V IP with a mature commercial toolchain, the partners seem to be positioning RISC-V as a credible platform for innovation across electrification, software-defined vehicles, and intelligent mobility.