Arasan launches dual-mode xSPI eMMC PHY IP

Arasan Chip Systems has introduced the industry’s first combo PHY IP that supports both xSPI NOR flash and eMMC NAND flash in a single unified block. The xSPI + eMMC Combo PHY IP is now accessible and is targeted at SoCs and MCUs requiring both high reliability and cost-efficient bulk storage.

For eeNews Europe readers involved in embedded, automotive, industrial, aerospace, or medical designs, this announcement is significant as it addresses a common dilemma: the choice between reliable NOR for boot and critical code, or higher-density NAND for data storage. Arasan’s innovative approach offers support for both memory types without the need for duplicating PHYs, pins, or silicon area.

One PHY for NOR and NAND

The new IP combines an xSPI PHY and an eMMC 5.1 PHY into a single solution, enabling designers to accommodate two different memory protocols using the same PHY. Arasan is positioning the combo as ideal for mission-critical applications in defense and aerospace, where NOR flash is essential for reliability, alongside NAND flash for extensive storage. The company also identifies medical devices and other life-critical systems as key target markets.

By providing a unified NOR and NAND PHY, Arasan is essentially informing customers that they no longer need to license and integrate separate PHY IP blocks to cover both memory types. This simplification can streamline SoC architectures, particularly in designs that necessitate reliable booting from NOR while also storing large volumes of data.

Shared I/O reduces pins and area

According to Arasan, the xSPI + eMMC Combo PHY IP is constructed around a shared I/O and analog front-end architecture. This shared approach decreases pin count and silicon footprint compared to discrete PHY implementations, resulting in lower system costs and reduced power consumption.

“This dual-mode PHY enables customers to seamlessly support both eMMC and next-generation xSPI devices with a single low pin count IP, reducing system costs and accelerating time to market. With the introduction of our xSPI + eMMC Combo PHY IP, Arasan continues to push the boundaries of storage interface IP innovation,” stated Ron Mabry, VP of Sales at Arasan.

The combo PHY is designed to seamlessly integrate with Arasan’s existing xSPI + eMMC Combo Controller IP, providing customers the option to license a matched controller-PHY solution if desired.

Broad portfolio and immediate availability

Arasan reports having delivered over 200 licenses of its eMMC IP and positions itself as a leading provider of xSPI IP, covering both NOR and NAND flash markets individually and now collectively. The xSPI + eMMC Combo PHY IP is currently available for licensing on major foundries, supporting process nodes from 28nm down to 3nm.

With embedded systems facing the challenge of achieving more in less space, Arasan’s integrated PHY approach mirrors a broader trend towards tighter integration in storage interface IP.