Breakthrough: SOT-MRAM Poised to Replace Last-Level Cache

Imec’s extremely scaled spin-orbit transfer MRAM (SOT-MRAM) devices have achieved record performances of a switching energy below 100 femto-Joule per bit and endurance of more than 10 to the power of 15.

These impressive results position SOT-MRAM as a promising candidate for replacing SRAM as a last-level cache memory in high-performance computing (HPC) applications. Similar to SRAM, SOT-MRAM offers a high switching speed in the sub-ns regime, along with unlimited endurance.

Furthermore, SOT-MRAM bit cells, being nonvolatile, achieve lower standby power compared to SRAMs, especially at high cell density. Additionally, the potential for making SOT-MRAM bit cells much smaller than SRAM cells opens up the possibility of achieving a higher bit packing density.

With its switching energy below 100 femto-Joule per bit, Imec's SOT-MRAM devices have set a new record in terms of energy efficiency. This breakthrough paves the way for more energy-efficient computing systems, particularly in HPC applications where performance and power consumption are critical factors.

Another advantage of SOT-MRAM is its exceptional endurance, surpassing 10 to the power of 15. This means that the SOT-MRAM devices can endure an extremely high number of write and erase cycles without degradation, ensuring long-term reliability and durability.