Credo to reveal AI interconnect solutions at TSMC 2026 Symposium

Credo Technology Group is gearing up to unveil its latest high-speed connectivity solutions for AI infrastructure at the TSMC 2026 Technology Symposium, commencing on April 22 in Santa Clara, California. The company is all set to participate in various symposium stops and workshops across North America, Europe, and Asia until July.

For eeNews Europe readers, this announcement sheds light on the continuous efforts to address one of the major challenges in AI hardware: memory and interconnect bottlenecks. It also emphasizes the significance of ecosystem collaboration around advanced nodes in shaping the future of data infrastructure.

Tackling AI Memory Bottlenecks

Central to Credo’s presentation is OmniConnect Weaver, the inaugural solution in its OmniConnect lineup. Engineered to combat memory bandwidth and latency constraints in AI inference workloads, Weaver seamlessly integrates 112G VSR SerDes with a lightweight AXI framer.

Developed on cutting-edge process nodes from TSMC, such as 5nm and 3nm, the solution aims to provide high-bandwidth, low-latency connectivity across various architectures — from on-die links to chiplet-based designs.

Credo asserts substantial enhancements over traditional LPDDR5X approaches, including a 10× surge in I/O beachfront density and up to 20× higher memory density. These advancements target the scalability hurdles encountered in AI inference as models become larger and more intricate.

Pushing High-Speed SerDes Performance

Alongside Weaver, Credo will also introduce its 224G PAM4 SerDes IP, implemented in TSMC’s 3nm process technology. This solution facilitates 224G per lane data transmission, supporting aggregate bandwidths of up to 1.6Tbps.

Such elevated performance levels are increasingly crucial for hyperscale data centers, cloud computing, and AI clusters, where efficient high-speed interconnects play a pivotal role in system throughput and power consumption.

“Credo has a longstanding partnership with TSMC, and we both share a vision for propelling AI forward through innovation and collaboration,” stated Jeff Twombly, Vice President of Business Development at Credo. “TSMC’s Technology Symposium events serve as a platform to bring the ecosystem together for learning, networking, and idea exchange. We cherish the opportunity to contribute to these vital discussions that are shaping the energy-efficient, scalable AI architecture of tomorrow.”

Global Symposium Presence

Credo’s involvement spans multiple locations, including stops in Austin, Boston, Hsinchu, Amsterdam, Shanghai, and Yokohama. This extensive presence mirrors the global nature of semiconductor ecosystem development, especially as AI fuels the demand for advanced packaging, chiplet integration, and high-speed interconnect technologies.

With AI infrastructure expanding rapidly, solutions like OmniConnect Weaver and next-generation SerDes IP underscore a growing emphasis on optimizing data movement — an aspect increasingly deemed as critical as compute performance itself.