ESD Alliance highlights AI in chip design

The Electronic System Design Alliance (ESD Alliance) is putting agentic AI firmly in the spotlight at its 2026 Executive Outlook, signaling how quickly the technology is moving into mainstream chip development. Scheduled for June 10 in San Jose, the event will gather EDA and AI leaders to explore the next phase of semiconductor design.

For eeNews Europe readers, the discussion highlights a key inflection point: how AI-driven automation is reshaping verification workflows and collaboration models across the semiconductor ecosystem. It also offers insight into how established tool vendors and startups are beginning to converge.

Agentic AI moves into chip design

The theme, “How Will Agentic AI Change Chip Design and Verification?”, reflects growing industry momentum behind autonomous and semi-autonomous design tools. The panel will examine early implementation successes and the practical realities of deploying agentic AI in production environments.

Moderated by Ed Sperling, the session aims to cut through the hype and focus on tangible benefits, including productivity gains and improved verification coverage. The discussion is also expected to address broader implications for innovation cycles and engineering workflows.

Collaboration across ecosystem

A notable focus will be the collaboration between traditional EDA vendors and emerging AI startups. Executives from companies including Breker Verification Systems, ChipAgents, Moores LabAI, Silimate and Verific Design Automation will share perspectives.

The event will take place at Cadence Design Systems headquarters, underscoring the role of established players in fostering innovation alongside newer entrants.

Organized under SEMI, the ESD Alliance continues to position itself as a forum for addressing technical and market shifts in chip design. With agentic AI now entering real-world deployments, the 2026 Outlook could offer an early look at how the balance between human engineers and intelligent systems will evolve.