Gigadevice taps Arteris for next gen chip interconnect

GigaDevice in China has licensed FlexNoC 5 interconnect IP for Arteris for its next generation of automotive microcontrollers.

The FlexNoC 5 interconnect IP integrates hardware reliability and functional safety features, ensuring compliance with automotive standards. Physical awareness in the network on chip (NoC) implementation improves place and route efficiency and reduces interconnect area and power consumption, especially with the redundancy that is needed for functional safety (FuSa).

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The NoC’s physical awareness also allows GigaDevice to anticipate design challenges early on, significantly reducing iteration cycles. The company develops microcontrollers based on both the ARM and RISC-V instruction sets.

“We chose Arteris because of its proven track record in interconnect technology and experienced support team,” said Sherry Jia, Senior Director of MCU Department, GigaDevice. “FlexNoC 5 is especially valuable when managing the complexities of functional safety standards.”