HighTec and SiFive Strengthen RISC-V Safety Tools

HighTec EDV-Systeme has entered into a collaboration with SiFive to facilitate the development of safety-ready RISC-V software tailored for automotive and industrial systems. This partnership merges HighTec’s certified LLVM-based toolchains for Rust and C/C++ with SiFive’s safety-centric RISC-V processor IP.

For readers of eeNews Europe, this announcement holds significance as RISC-V continues to make inroads into safety-critical embedded designs, where factors such as tool qualification, extended product lifecycles, and certification support are just as crucial as processor performance.

Exploring Safety-Critical Design in Depth

The trend towards software-defined vehicles and increasingly interconnected industrial platforms is fueling the demand for open processor architectures that can adhere to stringent safety and cybersecurity standards. While RISC-V offers versatility through its open ISA, its adoption in automotive and industrial systems heavily relies on the surrounding software ecosystem.

HighTec and SiFive are working towards lowering this barrier by aligning compiler technology, safety documentation, and processor IP. According to the companies, this alignment could assist developers in streamlining integration processes and expediting the journey to production for safety-critical RISC-V designs.

Toolchains Catering to Safety and Security Needs

HighTec’s Rust and C/C++ toolchain is certified for ISO 26262 up to ASIL D and complies with ISO 21434 cybersecurity prerequisites. Leveraging LLVM as its foundation, the toolchain supports SiFive’s RISC-V IP and enables teams to merge existing C/C++ software with Rust-based development.

Moreover, the toolchain incorporates a Qualification Kit designed to aid in tool qualification and certification endeavors. This feature could prove beneficial for automotive and industrial engineering teams seeking to introduce RISC-V without introducing unnecessary certification complexities.

SiFive’s automotive-centric processor IP delivers scalable performance while incorporating inherent support for functional safety and security requirements. Engineered for safety-critical applications, these cores prioritize system integration, lifecycle support, and certification planning as central design considerations.

Partners Emphasize Ecosystem Adoption

John Ronco, SVP of Product at SiFive, remarked, “The RISC-V ecosystem is expanding rapidly, and we are delighted to have the backing of HighTec’s open-source-based compiler technology for our RISC-V cores. Through our close collaboration, we empower developers to optimize performance, address functional safety requirements, and significantly reduce time to production.”

Mario Cupelli, CTO of HighTec EDV-Systeme GmbH, expressed, “HighTec is deeply committed to open standards like RISC-V and open-source technologies such as LLVM, viewing them as pivotal drivers for safe and secure innovations in modern embedded systems. With our safety- and security-certified toolchains and robust technology partners like SiFive, we are ushering in these technologies into safety-critical automotive and industrial applications, enabling scalable software platforms and accelerating the adoption of RISC-V across the ecosystem.”