Kioxia announces low-power, high density OCTRAM technology

Kioxia Corporation has announced the development of OCTRAM (Oxide-Semiconductor Channel Transistor DRAM), a new type of 4F2 DRAM, comprised of an oxide-semiconductor transistor that has a high ON current, and an ultra-low OFF current, simultaneously.

This memory technology is expected to realise a low power DRAM by bringing out the ultra-low leakage property of the InGaZnO transistor. The OCTRAM technology was jointly developed by Nanya Technology and Kioxia Corporation and has the potential to lower power consumption in a wide range of applications, including AI and post-5G communication systems, and IoT products.

The OCTRAM utilizes a cylinder-shaped InGaZnO vertical transistor (Figure 1) as a cell transistor. This design enables the adaptation of a 4F2 DRAM, which offers significant advantages in memory density compared to the conventional silicon-based 6F2 DRAM as well as saving on power consumption.

Conventional silicon 6F2 DRAM memory cells run into problems with patterning extremely small features of conventional memory cells, while suppressing “row hammer” electrical interference from nearby cells are major challenges. As a result, industry has been actively developing denser 4F2 DRAM designs made with different materials.

The development by Kioxia, in conjunction with Nanya Technology realises a new type of 4F2 DRAM comprising indium-gallium-zinc oxide vertical channel transistors and a new integration scheme, where the heat-sensitive transistors are placed on the top of high aspect-ratio capacitors instead of on the bottom, to reduce the thermal impact from BEOL processing. The vertical architecture also fully suppresses row hammer interference, because the active region isn’t shared with adjacent cells..

The InGaZnO vertical transistor achieves a high ON current of over 15 μA/cell (1.5 x 10-5 A/cell) and an ultra-low OFF current below 1-aA/cell (1.0 x 10-18 A/cell) through device and process optimization (Figure 2). In the OCTRAM structure, the InGaZnO vertical transistor is integrated on top of a high aspect ratio capacitor (capacitor-first process). This arrangement allows for the decoupling of the interaction between the advanced capacitor process and the InGaZnO performance.