AI chiplet tech enables 100x100mm packages

Sarcina Technology has made significant strides in the development of an AI chiplet platform capable of creating systems as large as 100 x 100mm within a single package. This innovative platform leverages the FOCoS-CL (Fan-Out Chip-on-Substrate-Chip Last) assembly technology provided by packaging giant ASE, incorporating an interposer that supports chiplet designs utilizing the UCIe-A standard.

By utilizing a die-to-die interposer, AI customers can harness the power of chiplets to construct expansive silicon areas, facilitating high-performance computing with enhanced wafer yields compared to monolithic devices. This approach also enables the amalgamation of diverse technologies, paving the way for cutting-edge advancements in the field.

One of the standout features of this large package design is its capacity for integrating more memory, a crucial element for generative AI applications that necessitate swift and parallel data processing capabilities. This enhancement opens up new possibilities for AI systems, enabling them to handle complex tasks with greater efficiency and speed.

The Sarcina team has achieved a significant milestone by developing an interposer with up to 64 bits of data interface per module, achieving impressive data rates of up to 32 GT/s. This accomplishment represents a significant leap forward in terms of UCIe-A performance, aligning with the stringent requirements outlined in the UCIe 2.0 standard.

Moreover, the FOCoS-CL technology emerges as a cost-effective alternative to the expensive 2.5D TSV (Through-Silicon Via) silicon interposer technology or silicon bridge die with fan-out RDL interconnections. This cost-efficient solution offers a viable path for AI customers looking to optimize their computing infrastructure without incurring exorbitant expenses.

With the ability to accommodate multiple modules arranged in parallel along the silicon die edge, as well as the option to incorporate up to 20 LPDDR5X/6 packaged memory chips or eight HBM3e memory stacks, the chiplet packaging platform provides a versatile solution for diverse computing needs. The inclusion of LPDDR6 memory with 3D stacking technology further enhances data rates, making it a compelling choice for demanding applications.