Alchip tapes out 2nm test chip

Alchip Technologies in Taiwan has taped out a test chip in the latest 2nm technology for ASIC designs.

The test chip won’t be back from the unnamed foundry until the first quarter of 2025, and will contain test structures for its ASIC designs as well as high-speed SRAM and its Lite I/O with shared and non-shared power domains, positioning it to handle 3D stacked chip and chiplet options.

The test chip will establish the design flow and methodology for the latest nanosheet transistor structures. It will also generate power, performance, and area (PPA) data from the 2nm process technology.

This will help the company which is actively engaged with customers on high performance 2nm ASIC development.

• TSMC details 2nm process at IEDM
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While the foundry is not mentioned, AIchip says the results will help it prepare for future advancements toward next-generation 1.6nm process technology. Both TSMC and Samsung have 2nm offerings, but only TSMC has talked about its 16A 1.6nm process, and AIchip is a TSMC partner. Intel also has an 18A process for its foundry process.

“We’re open for business and ready to serve customer’s 2nm demand. This test chip showcases our ability to push the boundaries of high-performance computing and artificial intelligence design,” said Erez Shaizaf, Alchip CTO.

Johnny Shen, Alchip’s President and CEO, added, “Our 2nm test chip represents a significant leap forward in technology and demonstrates our readiness to engage in the most advanced ASIC development. We’re looking forward to seeing how this breakthrough impacts the semiconductor industry.”