Revolutionary Integration: Pre-Silicon and Post-Silicon Verification Combined in New System

Spirent and Cadence Collaborate to Offer Networking SoC Verification Software

Spirent and Cadence have joined forces to provide networking System-on-Chip (SoC) verification software that aims to bridge the gap between pre-silicon and post-silicon verification. This collaboration brings virtual Ethernet traffic emulation and testing capabilities to pre-silicon verification in the Cadence Palladium Z2 Enterprise Emulation and Protium X2 Enterprise Prototyping systems.

The software has the capacity to emulate any port speed from 1G to 800G at the application level and introduces additional features to enable new use cases as required. It is specifically designed to meet the increasing data bandwidths needed to verify designs for data centers and other high-performance applications.

By combining the data rates and port densities of Spirent TestCenter with the verification capabilities of the Cadence Palladium and Protium systems, this partnership offers a unified solution with reusable, portable, and automated test cases. This collaboration aims to streamline the verification process and enhance the efficiency of chip design and development.

Benefits of the Collaboration

The collaboration between Spirent and Cadence brings several benefits to the table. Firstly, it enables the emulation of virtual Ethernet traffic, allowing for comprehensive testing and verification of networking SoCs. This ensures that the designs meet the required performance standards and can handle the increasing data bandwidths demanded by modern applications.

Additionally, the software offers the flexibility to emulate various port speeds, ranging from 1G to 800G. This versatility allows designers to test their designs under different scenarios and adapt to evolving industry requirements.

Furthermore, the collaboration provides a unified solution with reusable and portable test cases. This means that test cases developed for one system can be easily transferred and utilized in other systems, saving time and effort in the verification process.

Overall, the collaboration between Spirent and Cadence aims to accelerate the chip design and development process by offering advanced networking SoC verification software. This software provides comprehensive testing capabilities, flexibility in port speeds, and a unified solution with reusable test cases. To learn more about this collaboration and the software's features, visit www.spirent.com/campaign/accelerate-chipset-design-and-development-with-cadence. You can also watch a short video and download the Spirent Chip Design Verification Solution datasheet for more information.