Astera Labs ramps production of PCIe 6 AI interconnect

Astera Labs is gearing up production of its PCI Express 6 (PCIe) chips to cater to a variety of AI infrastructure platforms. The company has introduced a gearbox that enables the combination of PCIe5 and 6 technologies, in addition to fabric switches, retimers, and active cable modules utilizing the latest PCIe 6 standard.

The shift towards PCIe 6 is being fueled by the increasing demand for enhanced compute, memory, networking, and storage data throughput, with hyperscalers set to unveil systems later this year. The Aries 6 PCIe Smart Gearbox chip is currently in the sampling phase, allowing processors and high-speed memory with PCIe 6 interfaces to be integrated into existing systems.

Each port is autonomous and can operate at various speeds, including 64 GT/s, 32 GT/s, 16 GT/s, 8 GT/s, 5 GT/s, or 2.5 GT/s, with a link width of x16, x8, x4, x2, or x1. This innovation enables the incorporation of PCIe 5 channels alongside new PCIe 6 links, following the successful PCIe 6 interoperability demonstration conducted in March.

Customers of Astera Labs encompass industry giants such as AMD, Samsung, and Micron, along with server manufacturers like Inventec, Quanta, Wistron, and WiWynn. The technology is also backed by Keysight Technologies and Teledyne Lecroy for testing and validation purposes.

“Our PCIe 6 solutions have undergone rigorous qualification with prominent AI and cloud server clients, and we are scaling up production in sync with the launch of their next-gen AI platforms,” stated Thad Omura, Chief Business Officer at Astera Labs. “By expanding our PCIe connectivity portfolio with Scorpio Fabric Switches, Aries Retimers, Gearboxes, Smart Cable Modules, and PCIe over optics technology, we are equipping our hyperscaler and data center partners with the essential tools to expedite the development and deployment of cutting-edge AI platforms.”

“Inference has emerged, and the upcoming wave of AI infrastructure must pivot to address the deployment of AI agents and assistants. Inference generates more IOPS than any enterprise workload ever encountered. Micron and Astera Labs are at the forefront of delivering these IOPS through the early enablement of PCIe Gen6 high-performance SSDs. Micron’s dedication to technological innovation and extensive ecosystem support has culminated in verified interoperability with Astera Labs,” remarked Jeremy Werner, senior vice president and general manager for the Core Data Center Business Unit at Micron Technology.