Kioxia to detail emerging memory advances at IEDM 2024

Kioxia Corporation has announced that its research papers detailing advances in emerging memory technologies have been accepted for presentation at IEEE International Electron Devices Meeting (IEDM) 2024.

Beyond its state-of-the-art 3D flash memory technology, BiCS FLASH™, Kioxia excels at research in emerging memory. The company is constantly striving to meet the needs for future computing and storage systems with innovative memory products.

Existing computing systems leverage DRAM, a primary memory device enabling CPU to process data swiftly, alongside flash memory for the storage of extensive data. Kioxia is spearheading research and development for Storage Class Memory (SCM), a memory technology positioned between DRAM and flash memory in the semiconductor memory hierarchy, designed to handle larger data volumes than DRAM and at higher speed than flash memory.

At IEDM, Kioxia will unveil cutting edge technologies tailored to each of these three semiconductor memory layers — a new type of DRAM utilizing oxide semiconductors with a focus on reducing power consumption; MRAM suitable for larger capacities for SCM application, and a novel structure of 3D flash memory with superior bit density and performance.

A new type of DRAM, Oxide-Semiconductor Channel Transistor DRAM (OCTRAM) was jointly developed by Nanya Technology and Kioxia Corporation. The companies developed a vertical transistor that enhances circuit integration by improving the manufacturing process, and achieved extremely low current leakage by bringing out the properties of the transistor using an oxide-semiconductor. The OCTRAM can potentially lower power consumption in a wide range of applications, including AI and post-5G communication systems, and IoT products.

Paper 6-1 at IEDM 2024: Oxide-semiconductor Channel Transistor DRAM (OCTRAM) with 4F2 Architecture

Jointly developed by SK hynix and Kioxia Corporation, high-capacity crosspoint MRAM technology achieved cell read/write operation at the smallest-ever scale of cell half-pitch of 20.5 nanometers for MRAM by combining cell technology that pairs selectors suitable for large capacities with magnetic tunnel junctions, and applied fine processing technology for crosspoint-type arrays. Memory reliability tends to degrade as cells are miniaturized. The companies developed a potential solution by utilizing a new readout method that leverages the transient response of selectors and by reducing the parasitic capacitance of readout circuits. This emerging memory technology has practical applications for AI and big data processing.

Paper 20-1 at IEDM 2024: Reliable memory operation with low read disturb rate in the world smallest 1Selector-1MTJ cell for 64 Gb cross-point MRAM

Kioxia has developed a next-generation 3D memory with horizontal cell stacking structure. This new 3D structure improves reliability and prevents degradation of NAND-type cell performance. Degradation of performance typically occurs when the number of stacked layers increases in conventional structures. The new structure arranges NAND-type cells horizontally by stacking them compared to the conventional structure of vertically arranging NAND-type cells. It allows for the realization of 3D flash memory with high bit density and reliability at low cost.

Paper 30-1 at IEDM 2024: Superior Scalability of Advanced Horizontal Channel Flash For Future Generations of 3D Flash Memory