Microchip Launches 64-bit PIC64 Family with RISC-V Architecture

Microchip has recently introduced its inaugural 64-bit microprocessor line, debuting with a multicore RISC-V cluster for the PIC64GX family. The PIC64 GX1000 utilizes the existing RISC-V four-core cluster, accompanied by a fifth microcontroller serving as a system monitor from the PolarFire FPGA family released in 2019, all on the same process technology.

Shakeel Peera, VP of strategy and business operations for the FPGA business unit at Microchip, stated, “We are ready to launch a line of 64-bit MCUs, and first out of the gate we have taken the multicore subsystem (MSS) and developed a product to expand into the non-FPGA world.” The company plans to offer versions with 64-bit A-class ARM processor cores alongside the RISC-V cores.

Peera further explained, “With RISC-V, we aimed for a homogeneous core complex to minimize the number of transistors for asymmetric multiprocessing (AMP) and reduce static current and power consumption.” The RISC-V cores were collaboratively developed for PolarFire with SiFive, utilizing the U54 core with custom extensions, and Microchip has integrated fixed function blocks for video, imaging, and video processing.

Regarding the technical specifications, Peera mentioned, “This is on the same 28nm process. The 625MHz cluster frequency is optimized for lower MIPS performance to keep wafer costs at a minimum.” The GX1000 features a 2MB SRAM level two (L2) cache with a flexible design that can be allocated to the four cores or used as shared memory.

Looking ahead, Microchip plans to release a higher performance version, the GX1100, in March 2025, featuring a separate memory-mapped machine learning acceleration block, H.264 video codec, DSI-2 interconnect, and DDR4 memory options. The company envisions various versions tailored for intelligent edge applications, each requiring a range of single-core and multicore processors with specific functionalities.