Codasip, based in Munich, has recently unveiled a new RISC-V core that promises significant enhancements in performance and efficiency. The L110 low power embedded processor core boasts up to 50% improvements in performance per watt and a 20% reduction in code size. This release coincides with the introduction of Codasip Studio Fusion, the next generation of processor design automation tools, which enables designers to incorporate customizations for application-specific Power, Performance, and Area (PPA) enhancements.
The inclusion of Bounded Customization in Codasip Studio Fusion empowers customers to swiftly bring high-quality, fully verified RISC-V cores to market. This feature ensures that the core can be expanded with new instructions without compromising the functionality of the baseline core. Moreover, a new verification framework simplifies the process of verifying custom instructions, streamlining the customization process for designers.
At an upcoming exhibition, Codasip plans to showcase its expertise in CHERI security and hardware/software co-optimization. The base L110 RISC-V RV32IEMCB core design is tailored for small-area, low-power applications like state machine replacements, sensor controllers, and IoT edge devices. Codasip highlights that the core delivers superior performance per watt and code size reduction compared to similar offerings in the market.
According to Brett Cline, the chief commercial officer at Codasip, the ability to customize the core with new instructions specific to the software workload can lead to significant improvements in Power, Performance, and Area (PPA). The latest core offering from Codasip provides exceptional performance for small-area and low-power applications, coupled with the flexibility for easy and rapid customization without compromising core functionality.
Codasip's latest release, Codasip Studio Fusion, enhances the core customization process by introducing a segmentation layer. Customers can configure the core from predefined options, create custom instructions within specified boundaries, or design freely. The toolset automatically generates a Software Development Toolkit (SDK) containing essential components like a compiler, simulation models, debugger, and profiler, as well as a Hardware Development Kit (HDK) comprising RTL, a verification framework, and more.