Breakthrough: ReRAM Module Taped Out in 130nm BCD Process

The collaboration between Weebit and DB HiTek has resulted in the development of highly integrated demo ReRAM chips, which will be utilized for testing and qualification prior to customer production. These demo chips not only showcase the performance and robustness of Weebit's technology but also serve as a platform for further innovation and scalability.

The demonstration chip features a 1Mb ReRAM module that can be easily adjusted to accommodate different densities based on specific requirements. This module is fully integrated with essential components such as control logic, smart algorithms, decoders, IOs, and error correcting code (ECC). The incorporation of patent-pending analog and digital circuitry, along with smart algorithms, enhances the technical parameters of the memory array, setting a new standard for embedded applications.

Weebit and DB HiTek are actively working towards making Weebit ReRAM accessible to DB HiTek customers for integration into their systems on chips (SoCs) as embedded non-volatile memory (NVM). The goal is to have the technology fully qualified and ready for production by the second quarter of the 2025 calendar year. Select DB HiTek customers can already access Weebit ReRAM for design prototyping ahead of mass production.

DB HiTek's 130nm BCD process is particularly well-suited for analog, mixed-signal, and high-voltage designs in various applications, including consumer electronics, industrial equipment, and IoT devices. Weebit ReRAM offers a cost-effective, low-power NVM solution that is simple to integrate and exhibits exceptional retention capabilities even at elevated temperatures. Compared to traditional Multi-Time Programmable (MTP) technologies, ReRAM provides higher density and endurance, making it a preferred choice for BCD processes.

Coby Hanoch, CEO of Weebit Nano, expressed optimism about the progress, stating, "This milestone signifies our steady advancement towards the qualification of ReRAM in DB HiTek's BCD process as planned, enabling this cutting-edge technology to reach a wide range of customers. Early discussions with several DB HiTek customers have shown keen interest in integrating ReRAM into their SoCs, particularly in applications like smart power management integrated circuits (PMICs), where consolidation can lead to significant performance and cost benefits."

Ki-Seog Cho, CEO of DB HiTek, highlighted the benefits of embedded ReRAM for customers engaged in power management and high-voltage designs. By leveraging Weebit ReRAM within the 130nm BCD process, customers can access a high-density, low-power NVM solution that streamlines their designs and reduces overall complexity and size. The transition from a two-chip to a single-die configuration offers cost savings and enhanced efficiency.

Upon successful qualification, DB HiTek plans to integrate Weebit's memory module into its BCD 130nm Process Design Kit (PDK), providing customers with the flexibility to utilize standard modules or request customized solutions tailored to their specific requirements.