Chiplet market to top $411bn by 2035

The chiplet market will reach US$411bn by 2035, says a report by market researchers IDTechEx.

The IDTechEx report looks at the transformative impact of chiplet technology on semiconductor design, driven by the need for flexibility and cost-effectiveness as Moore’s Law slows. It highlights advancements by relevant players in the supply chain, addressing challenges such as integration, interconnect & communication, and thermal management.

The report provides a 10-year market forecast, projecting growth to US$411 billion by 2035 across servers, telecommunications, PCs, mobile phones, and automotive chips.

The adoption of chiplet technology is driven by its ability to address several critical limitations inherent in traditional monolithic chip designs. One advantage is its capacity to overcome constraints such as reticle size and the memory wall, which traditionally hinder the performance and scalability of semiconductor devices.

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By modularizing chip functions into discrete chiplets, manufacturers can optimize the use of semiconductor materials and processing nodes more effectively. In addition, chiplets can achieve better use of wafer corner space and have lower defect rate on chips, which are often underutilized in conventional chip designs, particularly in larger SoCs that demand an increasing number of functions.

The discrete components can be tested and validated individually before integration, boosting the manufacturing yield, allowing for higher output quality and reduced costs per unit.

Chiplets also allow a more flexible design process, enabling the integration of diverse functionalities tailored to specific applications without the need for entirely new chip designs. This flexibility not only reduces development time and costs but also allows for rapid adaptation to evolving technological demands.

While chiplets offer numerous advantages, they also present new challenges. The integration of multiple chiplets requires advanced interconnection technologies and standards to ensure seamless communication between components.

Thermal management is another critical area, as increased function density can lead to overheating if not properly managed. These challenges open up opportunities for various players in the supply chain. For instance, different areas of the package in chiplet design require distinct types of underfill materials to address specific needs, e.g. to protect the chips themselves, providing mechanical support and thermal stability, as well as to safeguard the delicate wires and solder balls that connect the chiplets, preventing issues such as delamination or separation. This creates demand for innovative materials that enhance reliability and performance.