Cryogenic CMOS transistors set to boost quantum computing

SemiQon Technologies (Espoo, Finland), a spin off from local research institute VTT, has announced the development of p- and n-type transistors capable of functioning efficiently at cryogenic temperatures.

The transistors enable the creation of CMOS logic circuitry and can be manufactured in existing CMOS wafer fabs without additional infrastructure, the company added.

Authors from SemiQon published a paper Millikelvin Si-MOSFETs for Quantum Electronics (see https://arxiv.org/abs/2410.01077) which details characterization of transistors with a subthreshold swing of 0.3 mV/dec at 420mK. The transistors are MOSFETs made on a fully-depleted silicon-on-insulator (FDSOI) wafer.

VTT also recently discussed the use of a hybrid quantum-CMOS technology to build a multiplexer for spin-based qubits. That chip was based on custom silicon on insulator (SOI) process with an all-silicon gate stack and 50nm gate width. That circuit showed low noise from 5.6K down to 300mK.

Conventional control electronics have been made using conventional methods but resulting heat dissipation that can impact the cryogenic temperatures and requires distance and insulation imposing limitations on quantum computer design.

SemiQon said its transistors are designed to perform optimally at temperatures of 1K and lower, the range in which most quantum computers operate. The transistors consume 0.1 percent of the power than traditional room-temperature transistors at the cryogenic temperatures.

This allows control and readout electronics to be place inside the cryostat alongside qubit processors

“This could potentially accelerate the development of quantum technologies, or even enable a new era of cryogenic electronics,” said Himadri Majumdar, CEO and co-founder of SemiQon, in a statement.

Beyond quantum computing these transistors have the potential to improve energy efficiency in spaceborne applications and high-performance computing, SemiQon said.

SemiQon said expects to deliver its first cryo-optimized CMOS transistors to customers in 2025.