Axelera AI Secures €61m for RISC-V HPC Chiplet

Dutch chip developer Axelera AI has secured a substantial funding of over €61 million to advance the development of a cutting-edge RISC-V AI chiplet tailored for high-performance computing (HPC) applications. The innovative Titania chiplet is set to build upon Axelera AI’s digital in-memory computing architecture, which promises near-linear scalability from the edge to the cloud.

The significant €61.6 million grant from the EuroHPC Joint Undertaking (JU) Digital forms part of the Autonomy of RISC-V for Europe (DARE) Project. This funding injection follows the highly successful $68 million Series B round for datacentre development, pushing the total amount raised by Axelera AI to over €200 million. As part of its expansion plans, Axelera AI intends to introduce transformer chip variants to complement its existing offerings.

The company is ramping up its research and development efforts across the Netherlands, Italy, and Belgium to bring the Titania chiplet to fruition by 2028. Leveraging the RISC-V open instruction set architecture with vector extensions, Axelera AI aims to swiftly adapt to evolving customer demands. Multiple Titania chiplets will be integrated into a System-in-Package (SiP) for enhanced performance and versatility.

“Our Digital In-Memory Computing (D-IMC) technology is built on a scalable multi-AI-core architecture, ensuring unmatched adaptability and efficiency. With proprietary RISC-V vector extensions, our mixed-precision platform excels across diverse AI workloads,” explained Evangelos Eleftheriou, CTO and co-founder of Axelera AI. The architecture facilitates seamless scaling from edge to cloud, streamlining expansion and optimizing performance in ways traditional approaches cannot match.

In-memory computing plays a pivotal role in reducing AI power consumption by eliminating energy losses associated with off-chip data movement. Advanced reasoning models like OpenAI-o1 and DeepSeek R1 demand significantly more inference computing compared to earlier transformer models. The Titania chiplet is poised to be a valuable addition to chips utilized in enterprise data centres, robotics, automotive, and various other sectors.

Italian equipment manufacturer Seco is set to unveil a range of edge AI systems featuring the Axerla Metis chip at the upcoming Embedded World 2025 exhibition in Nuremberg. Seco is integrating this technology into both hardware and software products to offer a comprehensive AI/IoT solution to the market. The SOM-COMe-BT6-RK3588 COM Express Type 6 module combines a Rockchip RK3588 processor with Axelera AI’s Metis AIPU, catering to industrial AI workloads such as computer vision and predictive maintenance.

Equipped with 32 GB LPDDR5-3200 memory for the CPU and a separate 2 GB LPDDRx-2133 for the AIPU, the system boasts impressive specifications including 1x Gigabit Ethernet, 2x USB Type-C with DP Alt mode, 4x USB 5 Gbps, 4x PCIe lanes, and AI performance of up to 214 TOPS at INT8 precision with 15 TOPS/W energy efficiency. Running on Seco’s Yocto-based Linux distribution, Cleo OS, the system facilitates seamless AI and IoT deployments by integrating Axelera’s Voyager software development kit (SDK) to optimize AI performance.

The collaboration between Axelera AI and Seco underscores a shared commitment to pushing the boundaries of AI-driven edge computing. By integrating Axelera’s Metis AIPU into Seco’s portfolio, the companies aim to deliver high-performance, scalable solutions that unlock new possibilities for clients, enabling the deployment of powerful AI applications with efficiency and confidence.

“AI has the potential to address real-world challenges, and Axelera’s objective is to empower individuals with cost-effective, high-performance solutions. By combining our user-friendly Metis platform with SECO’s robust portfolio, users worldwide can benefit from real-time insights and improved outcomes,” emphasized Alexis Crowell, Chief Marketing Officer for Axelera AI.