FAMES Open Call for 10nm, 7nm FD-SOI

Europe’s leading technology pilot line is inviting projects for the next generation of 10nm and 7nm designs on fully depleted silicon on insulator (FD-SOI) technology. FD-SOI is a domain where Europe excels, offering ultra-low power capability for digital, analog, and RF designs. The transition from the current 22nm process technology to 10nm and then to 7nm on high-volume 300mm wafers in the next two years can significantly enhance the competitiveness of European semiconductor companies.

An open call for companies to utilize the technologies in the FAMES FD-SOI pilot line attracted 50 in-person attendees and 100 remote participants, including startups, multinationals, and pilot line partners. Nick Flaherty spoke with the coordinators of the FAMES project at CEA-Leti in Grenoble, France, about the 90 pieces of equipment in the line and the embedded memory technologies necessary for various applications such as low-power microcontrollers, AI devices, RF devices, 5G/6G chips, automotive chips, smart sensors, trusted chips, and space components.

The FAMES project aims to provide pathfinding PDKs for FD-SOI advanced-node performance evaluation and multi-project wafers (MPW) for testing designs. Specific process steps, modules, integration flows, demonstrator results, and education and training on FAMES technologies will also be developed. The focus is on embedded non-volatile memory, with OXRAM and FRAM being key technologies, along with MRAM for security applications and in-memory compute for ultra-low power AI.

The pilot line, spread across four sites, will offer lithography, diffusion, etching, and packaging services. The line at Leti will feature 90 pieces of equipment for the 300mm wafer line, with a focus on advanced nodes using immersion lithography and self-aligned dual patterning to reach 10nm. The project coordinators emphasize the importance of collaboration between industry and academia, offering free pathfinding PDKs, simulation PDKs, and training to interested parties.

As the project progresses, test chips for the 10nm FD-SOI process are expected by 2027. The FAMES initiative is seen as a strategic move to support the EU semiconductor value chain, bringing together industry, SMEs, startups, and research institutions to foster collaboration and innovation. Partnerships with companies like Nokia and Stellantis highlight the potential impact of the pilot line on various industries, with a focus on accelerating the transition from research to industrial application.