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Failure mode enables single transistor for neuromorphic AI chips

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March 31, 2025

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Researchers in Singapore have made a breakthrough in the field of neuromorphic AI chips by utilizing a phenomenon typically seen as a failure mechanism. This innovation has led to the creation of a single transistor that significantly reduces the complexity of these chips. Traditionally, implementing neurons and synapses in neuromorphic chips required a substantial number of transistors per component. However, the team at the National University of Singapore (NUS) has found a way to replicate the electronic behaviors of neurons and synapses using a more streamlined approach.

Operating the device on the brink of punch-through conditions while adjusting the resistance of the bulk connection to ground results in a current spike that closely resembles the activity in an electronic neuron. This phenomenon, known as impact ionization, is typically considered a failure mechanism in silicon transistors. Nevertheless, the team, led by Associate Professor Mario Lanza from the Department of Materials Science and Engineering at the College of Design and Engineering, has successfully harnessed and controlled it to create a new type of neuromorphic transistor cell called NS-RAM.

By setting the bulk resistance to specific values, the transistor can store charge in the gate oxide, allowing the resistance of the transistor to persist over time. This mimics the behavior of an electronic synapse, enabling the transistor to function as either a neuron or a synapse by selecting the appropriate resistance for the bulk terminal.

In neuron mode, the two-transistor cell exhibits leaky-integrate-and-fire neural behavior and adaptive frequency bursting, with impressive characteristics such as a high switching slope, dynamic range, endurance, and energy efficiency. When operated as a synapse, a single transistor in the floating-bulk configuration can be programmed with multiple stable synaptic weights, showcasing high endurance over numerous cycles.

The team behind this groundbreaking research envisions a significant advancement in computing systems capable of processing vast amounts of information while consuming minimal energy. The NS-RAM cell, designed with two transistors on a 180nm process, allows for seamless switching between neuron and synapse operating modes, offering flexibility in neuromorphic AI chip designs. This innovative approach leverages commercial CMOS technology, ensuring scalability, reliability, and compatibility with existing semiconductor fabrication processes.

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