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Advancements in Niobium Vias for Superconducting Quantum Interconnects

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May 03, 2024

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Researchers in France have made a significant breakthrough in the field of quantum computing by developing superconducting interconnects for cryogenically-cooled quantum chips built on silicon wafers. This development, led by the team at CEA-Leti, involves the creation of a two-level superconducting backend-of-line (BEOL) using mainstream 200 mm silicon wafer technologies specifically designed for quantum interconnect applications.

The need for superconducting interconnects arises from the increasing complexity of connectivity schemes within solid-state quantum bits (qbits) that are crucial for scaling quantum systems. These schemes, often implemented in two- or three-dimensional architectures, require superconducting interconnects to address challenges related to compactness, thermal management, and signal dispersion. By utilizing superconducting interconnects, researchers aim to prevent heating effects that could perturb the supercooled qbits and disrupt quantum coupling.

The BEOL structure developed by the researchers consists of two niobium nitride (NbN) routing layers connected through planarized Nb-based plug vias. These vias are fabricated using standard damascene techniques with a two-step chemical mechanical polishing process to ensure high-quality interconnectivity. Wafer-level parametric tests are conducted to evaluate the technology's performance at room temperature, while die-level low-temperature electrical measurements in a cryostat are carried out to assess the superconducting properties of the vias.

Characterization of the vias reveals impressive properties, including a critical temperature of ≥ 6.4 K, a critical magnetic field of ≈ 3.6 T, and a critical current of 9.6 mA at 2 K and 0 T for a 25x25 via array. Furthermore, low-temperature radio-frequency measurements at 9 K demonstrate the stability of via resistance up to a few gigahertz, showcasing the viability of this novel technology for quantum computing applications.

These initial findings suggest a promising future for integrating superconducting vias within BEOL structures, whether as part of overlay onto spin qubits or as components of multi-layer wiring in multi-chip modules or interposers within solid-state qubit architectures. Ongoing research includes further radio-frequency measurements on test structures to evaluate cross-talk, capacitive coupling between routing levels, and the impact of vias on inductance in two-level designed inductors. The limitations posed by the Nb PVD process on via thickness are also prompting investigations into alternative deposition techniques and materials for quantum chip fabrication.

For more information, visit www.leti-cea.com

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