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Enhancing S32N55 Vehicle Processor with Debug and Trace at Embedded World

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April 10, 2024

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Programmierbare Logik & Systeme has introduced debug and trace support for NXP's S32N55 16-core software-defined vehicle processor, as announced recently. This new feature is included in the 2024 version of UDE, the company's universal debug engine.

With UDE, users can easily access and control the Cortex-R52 main cores and the Cortex-M7 auxiliary cores from a single debugger interface. This eliminates the need to open separate debugger instances for each core, providing a more streamlined debugging experience. The debugger interface is customizable to meet specific requirements and supports multiscreen operation.

Configurable perspectives in UDE allow for multiple views to be defined for different debugging tasks, with predefined configurations available for the S32N55 processor. Users have the flexibility to synchronize subsets of cores or disable synchronization as needed. By default, all cores in the S32N55 are part of a run control group, enabling seamless run control, breakpoints, and single-step operations across all cores.

PLS emphasizes the benefits of UDE's multicore breakpoint feature for applications that utilize multiple cores and shared code. This feature simplifies debugging by allowing breakpoints to be effective regardless of which core is executing the specific code at any given time.

For non-invasive multicore debugging and run-time analysis, PLS leverages features based on information recorded from Arm's CoreSight trace system, which is integrated into the S32N55 processor. These features include profiling, call graph analysis, and code coverage analysis, enhancing the debugging capabilities for complex multicore applications.

Designed with 16 Arm Cortex-R52 real-time processor cores and manufactured on a 5nm automotive-qualified process, the S32N55 processor is capable of supporting ISO 26262 ASIL D functional safety standards. It is targeted at central vehicle control units that consolidate functions from multiple ECUs, potentially incorporating legacy code from previous vehicle models. The processor features hardware virtualization to ensure deterministic isolation of multiple operating systems and code blocks, enhancing system reliability and security.

Visit PLS at Embedded World 2024 in hall 4, stand 310 to learn more about their latest offerings and solutions for embedded systems development.

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