European RISC-V Firms Back SignatureIP NoC Networks-on-Chip

Several European chip designers are embracing the network-on-chip (NoC) technology developed by US startup SignatureIP. Companies like Codasip in Germany and SemiDynamics in Spain are utilizing SignatureIP's configurable NoC tools to connect their RISC-V open architecture cores.

SignatureIP's CEO, Purna Mohanty, highlighted the company's mission to optimize SoCs for maximum speed and efficiency by leveraging modern interconnect technology. The NoC is specifically designed to meet the scalability, flexibility, performance, and power optimization requirements of RISC-V CPUs.

One of the key advantages of SignatureIP's NoC is its ability to efficiently scale and connect different configurations and sizes of RISC-V CPUs. This flexibility allows designers to customize the network architecture to suit the specific needs of the RISC-V cores they are integrating.

The close collaboration between members of the RISC-V community, such as Semidynamics and SignatureIP, is driving the rapid adoption of the architecture. By combining their technologies, designers can create multi-core chip designs on a coherent RISC-V/CHI platform and prototype them on FPGA for integrated performance testing.

Support for SignatureIP's NoC technology extends beyond Europe, with companies like Andes Technology in Taiwan and SiFive and Marquee Semiconductor in the US also recognizing the benefits. The industry is increasingly demanding high-performance, low-power CPU IPs that can seamlessly integrate with efficient and scalable NoCs.