High-efficiency LCEVC Video Decoder IP for 8K

VeriSilicon has introduced the VC9000D_LCEVC, a cutting-edge Low Complexity Enhancement Video Coding (LCEVC) video decoding IP tailored for high-performance and energy-efficient video processing. This innovative technology is designed to work in tandem with the VC9000D base video decoder from Verisilicon, offering up to 8K Ultra HD decoding capabilities. This makes it a perfect fit for advanced multimedia applications like smart TVs, set-top boxes (STBs), and mobile devices. The LCEVC IP boasts a high-performance hardware architecture and a complete subsystem that ensures superior video quality while imposing minimal load on the host CPU.

The most recent standard from MPEG and ISO, LCEVC (MPEG-5 Part 2), defines an enhancement layer that is combined with a base video encoded using a separate codec to generate an enhanced video stream. This enhancement stream introduces new features, including extending the compression capability of the base codec, reducing encoding and decoding complexity, and laying the groundwork for future enhancements. The VC9000D_LCEVC decoder is fully compliant with ISO/IEC 23094-2 (LCEVC) Main Profile, supporting up to Level 4.1, processing 8/10-bit depth data, accommodating resolutions up to 8192×8192, and utilizing a frame-by-frame decoding architecture. Additionally, it incorporates robust error detection mechanisms to ensure reliable video playback.

Equipped with a high-performance hardware architecture and a comprehensive subsystem, VC9000D_LCEVC delivers top-notch video quality while imposing minimal load on the host CPU. Its integrated Temporal Reference Frame Compression (TRFC) technology significantly reduces system bandwidth usage, while multi-level hierarchical clock gating minimizes dynamic power consumption. Furthermore, it integrates a post-processor for flexible output format conversion.

Delivered as a technology-independent, fully synthesizable Register Transfer Level (RTL) package, the VC9000D_LCEVC IP supports various process nodes and standard cell libraries, ensuring seamless integration into diverse System-on-Chip (SoC) designs. Weijin Dai, Chief Strategy Officer, Executive Vice President, and General Manager of the IP Division at VeriSilicon, emphasized the importance of efficient, scalable video solutions in the face of the rapid growth of 8K content, AI-driven video applications, and the escalating demand for high-quality streaming and immersive experiences. By enabling the seamless integration of LCEVC enhancement decoding into SoCs alongside the VC9000D base decoder, VeriSilicon aims to help customers reduce bitrate, optimize bandwidth and storage costs, and provide a highly efficient pathway to support next-generation multimedia applications.