88 Views

Breakthrough: Applied Successfully Implements Copper Wiring at 2nm Node

LinkedIn Facebook X
July 09, 2024

Get a Price Quote

The semiconductor industry is constantly evolving, with companies like Applied Materials leading the way in developing innovative solutions to enhance chip performance. Recently, Applied Materials introduced an enhanced low-k dielectric material aimed at reducing chip wiring capacitance and strengthening logic and DRAM chips for 3D stacking.

Low-k dielectrics and copper have long been staples in integrated circuits (ICs). However, with monolithic integration moving towards smaller dimensions, the challenge lies in ensuring the mechanical strength of chips and minimizing electrical resistance. Thinner dielectric materials can make chips more fragile, while narrowing copper wires can lead to higher power consumption.

Applied Materials has been utilizing its Black Diamond material to address these challenges, surrounding copper wires with a low-dielectric-constant film. The latest iteration, Black Diamond PECVD [Plasma-Enhanced Chemical Vapor Deposition], not only reduces the minimum k value but also enhances mechanical strength, enabling logic and memory die stacking.

Furthermore, Applied Materials has unveiled its latest liner-barrier materials system, already in use at the 3nm node. This system, a binary metal combination of ruthenium and cobalt (RuCo), reduces wiring liner thickness by 33 percent to 2nm. It also improves surface properties for void-free copper reflow and decreases electrical line resistance by up to 25 percent, ultimately enhancing chip performance and reducing power consumption.

Prabu Raja, president of the Semiconductor Products Group at Applied Materials, emphasized the importance of energy-efficient computing in the AI era. He stated, "Applied's newest integrated materials solution allows the industry to scale low-resistance copper wiring to the emerging angstrom nodes. Additionally, our latest low-k dielectric material not only reduces capacitance but also strengthens chips, pushing 3D stacking capabilities to new heights."

Recent Stories