Keysight Technologies has recently made significant advancements in its test fixtures to accommodate bare wide bandgap power chips, such as silicon carbide (SiC) and gallium nitride (GaN). These new technologies integrated into the measurement fixture are designed to minimize parasitics and eliminate the need for soldering directly onto the bare chip.
The compatibility of these fixtures extends to both versions of Keysight’s double pulse testers, offering a solution with parasitic power-loop inductance of less than 10nH to ensure clean and accurate dynamic test waveforms. This development marks a crucial step forward in the characterization of bare chips before they undergo packaging or assembly into modules, streamlining the development process.
Traditionally, measuring the dynamic characteristics of a power semiconductor bare chip required intricate soldering procedures directly onto the chip, a process prone to introducing parasitics that could compromise measurement accuracy. With the introduction of these innovative test fixtures, engineers can now perform dynamic characterization as soon as a chip is diced from a wafer, without the need for complex and error-prone soldering techniques.
The bare chip dynamic measurement system not only facilitates early-stage testing but also ensures the protection of the fragile bare chips during the testing process. By providing quick accommodation for bare chips and establishing reliable electrical contact without the use of probing, wire bonding, or soldering, the fixture minimizes parasitics in the test circuit and generates precise measurement waveforms for wide bandgap power semiconductor devices.
Thomas Goetzl, Vice President and General Manager for Keysight Automotive & Energy Solutions, emphasized the significance of these advancements, stating, “With the introduction of the new WBG semiconductor bare chip evaluation method, we are helping the industry expedite the development of highly efficient and robust power semiconductor discrete devices and power modules. Bare chip dynamic characterization, once regarded as almost impossible to do, is now possible with the extension to our power semiconductor test portfolio.”