Exclusive CEO Interview: Celestial AI’s Terabit Optical Interconnect

David Lazovsky, CEO of Celestial AI, recently shared with eeNews Europe the groundbreaking terabit optical interconnect and analog technology developed by the company to address the power consumption challenges of high-performance AI chips and chiplets.

One of the primary obstacles faced by high-performance AI chips in data centers is thermal issues. Hyperscaler operators are constantly seeking ways to enhance performance within existing thermal and power constraints. Celestial AI, based in Santa Clara, California, has introduced an innovative optical waveguide that efficiently distributes signals to the chiplet grating coupler. This advancement enables higher data throughput at reduced power consumption without escalating thermal profiles or costs.

Supported by the imec.xpand innovation fund and prominent US investors, Celestial AI is strategically securing a significant portion of photonic capacity over the next couple of years for its pioneering technology. The foundation of this technology lies in photonic integrated circuits (PICs) featuring an electroabsorption modulator (EAM) within the substrate and diodes integrated into the chip for data capture, revolutionizing chip design methodologies.

Unlike traditional limitations imposed by size, location, or performance of I/O pads in system-on-chip or chiplet configurations, the utilization of diodes facilitates the efficient packaging of optical data from the optical interconnect within the interposer. Lazovsky emphasizes the optimization of the system for power and latency, highlighting the critical role of energy efficiency in driving advancements in AI and data transmission.

By leveraging a thermally stable photonic interposer that seamlessly delivers data to any point on the die, Celestial AI's technology offers a transformative approach to high-performance ASICs, even within existing bridge technologies like CoWoS or EIB. The company's successful implementation of the technology in ASICs at 4 and 5nm, with proven volume, underscores its compatibility with CMOS processes and minimal capital-intensive requirements.

Furthermore, the analog design approach adopted by Celestial AI eliminates the need for digital signal processing to mitigate noise or enhance signal quality, resulting in a highly power-efficient system. The integration of a transimpedance amplifier (TIA) within the system effectively addresses inter-symbol interference (ISI), showcasing the company's commitment to delivering cutting-edge solutions in collaboration with top analog designers in the industry.