FAMES details FD-SOI pilot line commercial partners

Europe’s pilot line for fully depleted silicon-on-insulator technology (FAMES) has seen support from 44 companies across the continent. This follows the launch of the pilot line in January.

The €830m pilot line is developing 10nm and 7nm FD-SOI process technology for applications with a range of embedded non-volatile memories, radio frequency, 3D integration and power management integrated circuits (PMICs).

There is commercial support from 44 companies including Nokia, Ericsson, Nordic, Soitec, ASML, ASM, AMAT, TEL, GlobalFoundries, IBM, Intel, STMicroelectronics, Siemens, Orange as Meta as well as car maker Stellantis and tier one Valeo.

The pilot line will also drive eco-friendly practices by prioritizing resource optimization, advocating for a circular economy, and minimizing waste across  the entire technological process, from chip design to manufacturing. FD-SOI manufacturing is also simpler than CMOS, with a lower number of mask levels required for  production and a reduced number of process steps, resulting in reduced energy and resource consumption.

• All systems go for 7nm FD-SOI
• CEA-Leti launches €830m FAMES pilot line project
• European 1nm, FD-SOI, photonics chip pilot lines launch

The FAMES consortium is led by CEA-Leti in France with four hosting sites at CEA-Leti in Grenoble, France; Tyndall in Cork, Ireland; VTT in Espoo, Finland; and Silicon Austria Labs (SAL) in Vil-lach, Austria. They will operate a distributed pilot line and collectively integrate a set of new semiconductor equipment, in addition to their respective existing infrastructures.

There are seven additional partners: two research and technology organizations with imec and Fraunhofer Institute, four universities (Cezamat WUT (Poland), Université Catholique de Louvain (Belgium), University of Granada (Spain) and Grenoble INP (France)) and the SiNano Institute (Grenoble, France).

The technology will be used for new generations of microcontrollers, microprocessor units, chips for 5G/6G, smart imagers, smart sensors, processors for data fusion, wearable devices, trusted chips, quantum- and cryo-CMOS technologies, edge artificial intelligence chips and advanced packaging with chiplets.

Most of the FD-SOI value chain with wafer manufacturing, modelling, chip design and process is mastered and hosted in Europe. Soitec is a world leader in FD-SOI substrate wafers manufacturing, STMicroelectronics and GlobalFoundries use Soitec wafers to process 28 nm and 22 nm FD-SOI integrated circuits in Europe.

The FAMES pilot line has three main objectives. First, to offer a set of advanced technologies with two new generations of FD-SOI technology at 10 nm and 7 nm nodes, including embedded non-volatile memory (eNVM) solutions; radiofrequency components (passives, switches, and filters); 3D stacking options (3D sequential integration and 3D heterogeneous integration); and magnetic inductances for power management PMIC chips.

The second is to promote and provide open access to the pilot line to a wide range of stakeholders of the electronic value chain such as academic research teams, SMEs, start-ups or large industrial groups (materials and equipment suppliers, OEMs, foundries, integrated device manufacturers, EDA vendors and fabless chip companies.

The third aim is to develop training activities at master and PhD levels, so that inspiration from the demonstrator results can drive more skills and technologies for specific markets.

fames-pilot-line.eu