Silicon Quantum Dots: Enhancing Quantum Computer Reliability with Low Noise

imec in Belgium has recently achieved a significant milestone in the field of quantum computing by demonstrating high-quality silicon quantum dots built on 300mm wafers. This breakthrough could pave the way for the development of more reliable quantum computers that are scalable and compatible with existing silicon chip production processes.

The spin qubits, constructed as quantum dots by imec on a 300mm wafer process, offer a promising solution for large-scale quantum computer designs. The silicon spin qubits exhibited an average charge noise of 0.6µeV/ÖHz at 1Hz, marking a new milestone in noise reduction for a 300mm fab-compatible platform. This low noise level is crucial for achieving high-fidelity qubit control, which is essential for maintaining quantum coherence and ensuring precise control over the qubits.

By leveraging standard CMOS manufacturing technologies, imec has enabled wafer-scale uniformity and yield, along with advanced back-end-of-line interconnection of the Si quantum dot structures. These advancements are vital for the realization of truly large-scale quantum chips, capable of supporting millions or even billions of qubits operating in synchrony.

The quantum dot spin qubits developed by imec are defined by metal-oxide-semiconductor (MOS) quantum dot structures that resemble modified transistor configurations designed to trap a single spin of an electron or hole. To achieve long quantum coherence times, minimizing noise, especially charge noise, is paramount. The presence of residual charges near or within the quantum dot can degrade performance, underscoring the importance of noise reduction.

Industrial manufacturing techniques such as subtractive etch and lithography-based patterning have historically posed challenges in maintaining device and interface quality, particularly at the Si/SiO2 interface near the quantum dot qubits. However, imec's meticulous optimization and engineering of the 300mm Si/SiO2-based MOS gate stack have led to a breakthrough in achieving record-low average charge noise across 300mm wafers.