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STM 40LP Process Now Supports Mixel MIPI C-PHY/D-PHY IP

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July 03, 2024

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The MIPI C-PHY IP supports the v1.2 specification, while the MIPI D-PHY IP supports the MIPI D-PHY v2.1 specification. In C-PHY mode, the IP can achieve a speed of 3.5 Gsps per trio, equivalent to a data rate of 7.98 Gbps/trio. On the other hand, in D-PHY mode, the IP supports speeds of up to 2.5 Gbps per lane. By combining up to three trios in C-PHY and up to four lanes in D-PHY, the combo IP can reach an aggregate bandwidth of 23.94 Gbps and 10 Gbps in their respective modes.

Various configurations of this combo IP are available, including area-optimized transmitters or receivers that support either the MIPI Camera Serial Interface 2 (CSI-2®) or MIPI Display Serial Interface 2 (DSI-2SM). Additionally, there is a universal version of the IP that supports all configurations. Mixel also offers its patented RX+ and proprietary TX+ versions of its MIPI receiver and transmitter IPs. These unique configurations allow full-speed, in-system testing without the area penalty of a universal configuration, making them ideal for safety-sensitive applications like automotive and medical sectors.

Mixel's IP achieved first-time silicon success on a test chip manufactured in ST’s 40nm low power process technology. Other MIPI IP configurations are currently in development on another ST process technology, showcasing the company's commitment to innovation and advancement in the field.

"Mixel has been a valued Contributor member of MIPI Alliance and supporter of its specifications since 2006," said Sanjiv Desai, MIPI Alliance chair. "By offering their silicon-proven MIPI IP in ST’s 40nm low power process technology, Mixel is actively contributing to the growth of the MIPI ecosystem, fostering collaboration and progress within the industry."

The combo IP, which is silicon-proven at 4.5 Gsps per trio in C-PHY mode and 4.5 Gbps per lane in D-PHY mode, was initially announced in September 2020. Pascal Mellot, Imaging System & Silicon Products Director at STMicroelectronics, praised the close collaboration with Mixel Engineering teams, emphasizing the significance of achieving first-time silicon success in ST's process as a testament to Mixel's engineering excellence and methodology.

"The successful collaboration between our teams and the robustness of ST's process, combined with Mixel's engineering prowess, were instrumental in achieving first-time silicon success with this complex IP," said Ashraf Takla, Founder and CEO of Mixel. "Expanding the availability of our MIPI IP in another ST process technology is a significant step towards facilitating IC development for our mutual customers globally."

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