A watchdog timer is a piece of hardware that is constantly monitoring whether the processor is acting properly, and if it detects any anomalies it resets the processor. A watchdog timer is installed in almost every embedded system today, and it’s a mandatory solution especially in products whereas a human cannot access to reboot the system in case of a software failure.
A watchdog timer is basically an internal or external device that is installed in a system in order to detect any software anomalies that may arise in embedded systems. It has the responsibility to reset and restart the processor when needed in the case of a software glitch. A watchdog timer is sometimes also called a Computer Operating Properly as it ensures that the processor is functioning as it is meant to.
The mechanism behind the working of the watchdog timer is quite simple. The timer basically counts down from a particular value down till the number zero. As per its programming, the software selects a number during the count down and restarts the timer from the top at that given moment. Therefore, the timer never reaches the value of zero if the software is functioning normally.
In the case that there is some form of anomaly or malfunction in the software and it is inactive for some reason, the timer will not be reset and will most likely reach 0.
This indicates to the watchdog timer that there is some form of malfunctioning present in the software. As such, it will restart the processor by asserting the reset signal. Consider it to be a way of turning a device “off” and then “on” when it gets stuck in the middle.
The watchdog timer itself is a piece of hardware, often in the form of a chip that is attached externally to the processor. In some cases, it included in the CPU itself (internally). The output of the watchdog timer is then directly connected to the reset signal of the processor so that the timer restarts the device if it does not receive the proper input from the embedded system software.
Another way of referring to the restarting and resetting that the watchdog timer is the term kicking the dog. Picture it in this way: if you are attacked by a wild dog that is out for your blood, but you keep kicking it away, then you will not be bitten. If you fail to kick it away in time, it will bite you and restart you. The dog can be kicked (restart) via writing to the watchdog control port, as shown in the above diagram.
Even though the watchdog timer will restart the system every time it detects such an anomaly, it is important to monitor its activity occasionally as well. If the timer is stuck rebooting the same system again and again to no avail, it may be an indication that the equipment may be damaged worse than as expected and would either require to be fixed manually or be left alone as irreparable if it is inaccessible.
For inaccessible systems, it is essential that they be self-reliant and are able to reset the system themselves when needed without having to depend on a person to manually reboot its software. These systems need to be able to refresh themselves in the case that the software hangs so that they do not become permanently disabled and nonfunctional.
Watchdog timers are very frequently used in the likes of space probes and related equipment as once these are launched, they may never get in touch with humans ever again. As such, individuals that are adequately trained to analyses the performance of a space probe and fix it cannot access it. So, in order to prevent permanent disability of these probes in the case that they face a simple problem that can be easily resolved with reboot, a watchdog timer is installed.
Watchdogs can further be arranged varying patterns depending on the application that you wish to extract from them. In a single stage watchdog, you simply install one watchdog timer with the CPU as an external chip or integrated with a microcontroller. The CPU and the watchdog timer may share a single clock signal or may operate with separate clock signals.
Sometimes, you may install two or more watchdog timers in a series to create a multi stage where each timer is known as a stage. The first stage is connected to the controller or the processor and it initiates the corrective action in the subsequent stage. This carries on until the last stage has been reached. In such a manner, instead of having a single corrective action in the form of a restart, a multistage watchdog is able to deploy a sequential series of corrective actions triggered by each stage, allowing the user to employ a more complex and specific corrective course of action.