FPGA Basics

30/12/2020, hardwarebee

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FPGA technology was introduced in the 80’s and allowed digital design teams to create custom logic in a re-programmable single chip. Back in the 80’s, FPGA’s capabilities and programming tools were very basic and enabled design teams to perform simple and small-sized logic functions.


FPGA is a chip that allows designers to custom design a chip with infinite programming iterations. FPGA can be reprogrammed after production and in the field multiple times. This give companies a huge flexibility with backward compatibility and future upgrades. Just image an electronic product that can change its functionality after deployment (yes, just like software)


As opposed to ASICs which are “hardwired”, FPGAs are “Field Programmable Gate Array” (i.e. FPGA). FPGA allows you to change product functionality without any cost and extra effort.


FPGAs consist of logic gates. The more the gates the more functionality that can be squeezed into a single chip. In the 90’s FPGA had 6000 gates. Today, modern FPGAs consist of millions of gates and offer analog and high-speed IO functionalities in addition to the classic digital logic gates.


FPGA design is done via a programming language. This area has been also developed since the 80’s and today hardware description language is as modern as C++ and other modern software programming language.


VHDL counter example:

 always @(posedge clk)

 if (reset) begin

 out <= 8’b0 ;

 end else if (enable) begin

 out <= out + 1;



Using a high-level programming language makes it simple and easy to design an entire product into a single FPGA. FPGA designers do not need to worry about the gates placement and the routing inside the FPGA because a compiler (yes, just like in software) is responsible to convert the high-level block functionality into lower level gates and wires.


FPGA is programmed via special IO pins that can be connected to a CPU or a Flash memory. A CPU with an interface to the external world (via WiFi or USB interface) can easily fetch a new code for the FPGA and download it into the chip in real time or just after reset.

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