Choosing the Right FPGA for the Right Price

25/09/2018, hardwarebee

20 years ago, I was an FPGA developer in a large company, where we developed high speed wireless systems. The product consisted of several boards and every board had 3-5 FPGAs. FPGA unit price was always a big issue for us. Our sales people were pushing to lower the product cost, while the marketing folks wanted better performance (speed) and hence pushed for more costly FPGAs.


Two decades have passed and not much has changed. I am still involved in numerous discussions on how to choose the right FPGA that meets both price and performance goals, so I have decided to write down some guidelines that I have been using – hoping that it’ll help others struggling with similar dilemma.


Like with any other product, there are expensive and cheap FPGAs. Some of the more expensive FPGA’s can replace an entire system, letting you combine many different functionalities such as CPUs, high speed interfaces, digital blocks into a single chip. At the other end, there are cheap FPGAs that perform small tasks such as glue logic.


When discussing FPGA price, take into account that it combines both FPGA development costs and FPGA unit cost. In this article I will address the FPGA unit cost issue and how to make smarter decisions early on in the project phase.


Number of Input/Out Pins


When you draw your FPGA’s block diagram you will need to write down all the I/Os that your circuit requires. This is first input that will help you with the decision process, because if you need many I/Os – you will need a large FPGA.


If you are unsure, you can always start your design with a high I/O count FPGA and then when you get closer to production, try to lock all the pins and find a more suitable FPGA. Remember: a smaller FPGA means lower price. If you save even $1 per chip and your company sells 200K products per year, you’ve just saved your company $200K.


FPGA vendors have made our lives a bit easier. There are some FPGAs that overlap physical size and number of pins, therefore, allowing drop-in replacement of an FPGA that has same number of pins (and has more useable IOs). You can find an example below (Xilinx datasheet), where the table shows how “footprint compatible” chips provide users the freedom to go up or down the scale without changing the PCB layout.



Number of Gates


Number of Gates is a bit more difficult to estimate in the early stages, but as you progress with development, you will get more clarity about the number of gates. This is, of course, another key factor in the decision process.


Once you’ve nailed the gate number, the question left is how much headroom you should leave for future updates (or bug correction). One of the projects I have worked on had to go to production (and to customers) while knowing the FPGA code would need an update within a year. That’s one of the beauties of using an FPGA – field updates are possible.


If you are facing a similar dilemma, select an FPGA that is larger than the one that fits into the current design. It might be a waste of unused gates but will still be cheaper than field returns and recalls.


The following table shows Lattice’s MachXO2 FPGAs. You can see in the pink box how you could actually use the same package size, IOs and footprint to get higher or lower capacity FPGA. You could, for example, start the design with one FPGA type, layout the PCB and decide about the FPGA part number later on in the process.



FPGA Speed and Cost


Your FPGA implementation should meet your product specifications, therefore the questions related to which FPGA should you choose is highly depended on your design architecture. If you can choose an architecture that does not require a leading-edge FPGA, then you are lucky. But for me, I see FPGA speed and cost as given requirement.


Whenever I need FPGA price information I go to DigiKey, Farnell etc.


End of Life


When you are around for so many years you encounter a few End-of-Life cases. This means that the FPGA vendor is stopping the production of an FPGA chip due to different reasons. There is no real method to avoid this unfortunate situation. But there are ways to reduce the chances that your particular chip will be the victim.


First, always choose an FPGA family that is not more that 4-5 years old. Try to use the newest technologies if possibly. This will guarantee long(er) life time. Old chip will be based on mature wafer technology and 10 years from now the silicon fab may shut down the production line.


Secondly, look for pin compatibility (mentioned already above, I know). If you can find an FPGA that is pin compatible with other FPGAs, then you have a back up in case of End-of-Life.

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