Semidynamics Unveils Modular RISC-V Architecture for Scalable AI Processing

Barcelona-based Semidynamics is making waves in the world of artificial intelligence with its cutting-edge approach to AI chips and algorithms. The company's latest innovation, known as 'All-In-One AI,' is set to revolutionize the industry.

Unlike traditional AI chips that rely on a combination of multi-core CPUs, GPUs, and neural processors, Semidynamics is taking a different approach. The company is advocating for the use of multiple instances of a block that includes a 64-bit RISC-V CPU, a GPU-like vector unit, and an NPU-like tensor unit. This unique configuration allows for seamless data processing and minimal communication latency.

"The data is in the vector registers and can be used by the vector unit or the tensor unit with each part simply waiting in turn to access the same location as needed," explained Semidynamics CEO Roger Espasa. "This design eliminates communication latency and reduces the need for extensive caches."

In addition to its innovative chip architecture, Semidynamics has developed its own bus technology that enables sustained DRAM access beyond 50 bytes per cycle. This high-speed data transfer capability is crucial for handling complex AI workloads efficiently.

The company's tensor unit is specifically designed to handle matrix multiplication for convolutions, while the vector unit offers general programmability to tackle a wide range of activation layers. Semidynamics envisions its chips scaling from 0.25Top/s to hundreds of Top/s, showcasing impressive performance on benchmarks like the Yolo benchmark.

To assist customers in optimizing their chip configurations, Semidynamics offers a 'configurator' tool that recommends the ideal balance of tensor and vector units based on specific application requirements.

When it comes to splitting tasks across multiple processing units, Semidynamics provides flexible solutions. For AI tasks, the ONNX RunTime can distribute computations across various AI elements, while standard compiler parallelizing technologies like openMP or MPI can be utilized for high-performance computing tasks.

Looking ahead, Semidynamics plans to introduce hypervisor support for containerization and crypto-processing, further enhancing the versatility and security of its AI chips. For those interested in learning more about Semidynamics' groundbreaking technology, visit stand 5-337 at Embedded World in Nuremberg next week.