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ST adds to roadmap for AI-capable microcontrollers

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November 25, 2024

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STMicroelectronics NV is planning a series of upgrades to its proprietary neural network accelerator for microcontrollers to capitalize on an industry-wide trend towards AI at the edge.

ST is the “king of tiny edge AI,” said Remi El-Ouazzane, president of the microcontrollers, digital and RF product group, at ST speaking at the company’s Capital Markets day held in Paris last week.

 

El-Ouazzane said that increasingly AI tasks such as battery management, anomaly and fault detection and face and object detection and recognition would be performed at the edge to reduce power consumption and latency.

 

El-Ouazzane said that ST is seeing a strong uptick in AI MCU applications amongst its microcontroller customer base with more than 51,000 active projects initiated via the company’s edge AI development tools in the first nine months of 2024. This is three times the rate of the previous year, he added.

 

ST, which is strongly allied to Arm for the general-purpose processing cores within its microcontrollers, has opted not to use Arm-supplied AI hardware cores, unlike some smaller microcontroller suppliers.

In contrast, ST is developing proprietary neural processing cores.

ST developed its first neural network accerelator, the Neural-ART 1, three years ago and this is included as a core within the STM32N6 microcontroller. This has a maximum performance of 4.6 TOPS and an energy efficiency of between 1 and 5 TOPS/watt depending on the application. This is based on the use of 8-bit integer data type.

 

ST announced the STM32N6 some 30 months ago although El-Ouazzane indicated the microcontroller is only coming to market now. “It is already in development and adopted in more than 50 customers worldwide with super good feedback,” he said.

“We have the roadmap to go further with a generation two with digital in-memory compute [DIMC] that will bring a 4x improvement in performance over gen-one and we foresee a gen-three will bring another 10x performance jump over gen-two,” El-Ouazzane said.

However, the slide that El-Ouazzane showed during his talk indicated that the 10x performance jump is relative to gen-one.

Neural-ART 2 with DIMC will be capable of 18TOPS and between 20 and 40 TOPS/watt the slide shows and Neural-ART 3 is described as having a hybrid architecture and a performance of 50+ TOPS/watt. Again performances were said to be for the INT8 data type.

ST did not indicate a timetable for introduction or what manufacturing process technologies these cores might be implemented in.

El-Ouazzane said ST expects the STM32N6 to be one of the fastest of ST’s products to reach US$100 million in revenue.

He added that he hopes the introduction of the STM32N6 could be the third seminal product introduction that will be seen to market the advent of AI. The first two being the introduction in 2016 of Nvidia’s Pascal showing GPUs could be used for AI and the introduction in 2017 by Apple of the A11 Bionic chip, the first application processor that provided hardware support for AI.

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