SureCore and Agile Analog Collaborate on Cryogenic Quantum ASIC Development

Agile Analog, the Cambridge analog IP specialist, and sureCore, the Sheffield low power embedded memory IP developer, are collaborating on the implementation of a cryogenic control ASIC.

The ASIC will be fabricated using the GlobalFoundries 22FDX process, as part of the Innovate UK funded project: "Development Of Cryogenic CMOS To Enable The Next Generation Of Scalable Quantum Computers."

The consortium members have created cryogenic SPICE models for the GF 22FDX process technology. sureCore has utilized these models to recharacterize standard cell and IO cell libraries, as well as develop low power SRAM, ROM, and Register File Compilers.

These cryogenic IP libraries are being utilized to facilitate the development of a test chip that will enable the measurement of performance at cryogenic temperatures. Agile Analog is closely collaborating with sureCore to implement and verify its solution.

According to Barry Paterson, CEO of Agile Analog: "Integrating control and measurement electronics capable of operation down to 4 Kelvin is critical to enabling quantum computer scaling."

Agile Analog has completed the synthesis, floor planning, place and route, and design closure steps to ensure that the cryogenic test chip can serve as a qualification test vehicle. This will prove the viability of the approach adopted by the project for cryogenic control ASICs.

Semiconductor process technologies are typically characterized for operation from -40°C to 125°C. However, in the world of quantum computing, where operational qubits demand even lower temperatures than 4K, it is crucial to colocate the control electronics close to the qubits within the cryostat for quantum computer scaling.

To achieve their true potential, there is a need to dramatically increase the number of qubits from the several hundred that is currently possible to millions. These qubits need to be controlled, and currently, this is done using external control electronics housed outside of the cryostat at room temperature.

By generating semiconductor IP that can operate at cryogenic temperatures, quantum computing developers can quickly design their own control ASICs that can be colocated with the qubits in the cryostat.

"We were able to work extremely closely and identify critical issues early in the project, meaning that the physical design flow proceeded in a smooth and predictable manner," says sureCore CEO Paul Wells.