Synopsys and TSMC Explore 1.6nm Backside Routing for Trillion-Transistor AI and Multi-Die Chips

Synopsys recently unveiled its groundbreaking 1.6nm projects for backside power routing, a development that is poised to play a crucial role in the creation of trillion transistor chips. Collaborating with TSMC, Synopsys is integrating backside routing capabilities into TSMC's A16 1.6nm process within the Synopsys digital design flow. This initiative aims to address the intricate power distribution and signal routing requirements of the trillion transistor designs that were first highlighted by eeNews Europe in March.

Design teams can now leverage interoperable process design kits (iPDKs) and Synopsys IC Validator physical verification runsets to navigate the escalating complexity of physical verification rules. These tools facilitate a smooth transition of designs to TSMC N2 2nm technology, where power management is a critical factor for the success of trillion transistor multichip designs.

Meanwhile, Mediatek is also making strides in the realm of advanced chip design by developing 2nm chips at TSMC using AI-driven EDA flows. A collaborative effort involving TSMC, Synopsys, and Ansys has resulted in a multi-physics flow that supports CoWoS interposer packaging, effectively addressing thermal and power integrity challenges in chip design.

Looking ahead, Synopsys is exploring the integration of AI and 3D die technologies in trillion transistor designs. By partnering with TSMC to develop tailored EDA and IP solutions for AI designs on TSMC's advanced process and 3DFabric technologies, Synopsys aims to enhance productivity and deliver superior performance, power efficiency, and area optimization for advanced AI chip designs.

Intel is also gearing up for the trillion transistor era shake-up, with Synopsys' Custom Compiler and PrimeSim solutions playing a pivotal role in enabling designers to meet the demanding requirements of high-performance analogue design on the TSMC N2 process. This expanded collaboration between Synopsys and Intel is set to accelerate design migration and optimization efforts, ultimately enhancing the delivery process of industry-leading SoCs across various sectors.