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Tiny MCU Boasts 46 GOPs for Low-Power On-Chip AI/ML Processing

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June 18, 2024

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The Ensemble family of MCUs has introduced a new member to its lineup, the E1C, featuring cutting-edge technology to meet the demands of modern applications. This new MCU combines a 160 MHz Arm Cortex-M55 CPU core with Helium vector processing extension, an Arm Ethos-U55 NPU generating up to 46 GOPs, and up to 2MB of tightly coupled SRAM. Despite its powerful capabilities, the E1C is available in a tiny WLCSP package occupying a footprint of just 3.9 x 3.9 mm.

One of the standout features of the E1C is its aiPM technology, which enables dynamic power management to optimize energy consumption. By powering only the logic and associated memory that are in use at any given time, the MCU achieves the lowest overall system power consumption. The aiPM power management unit implements four system-level power modes, including a Stop mode, enhancing efficiency and extending battery life.

The introduction of the E1C expands the highly scalable Ensemble family, offering an entry-level option for OEMs seeking high AI performance and ultra-low power consumption in a familiar Arm environment. Sharing the same architecture as the Balletto family allows for software re-use across the entire family, facilitating easy migration of applications from one device to another.

Thanks to the efficient ML inferencing performance of the Ethos NPU and advanced aiPM power management system, the E1C can handle AI/ML and application control functions at ultra-low power levels. This capability enables manufacturers to integrate advanced ML features into products like wearable devices that have strict power and space constraints, enhancing user experience without relying heavily on cloud services.

The Ethos-U55 NPU delivers impressive ML output of 46 GOPS, performing 128 MACs/cycle and enabling on-the-fly weight decompression. This results in inferencing performance that is significantly faster and more power-efficient compared to competing MCUs based on an Arm Cortex-M4 CPU. The E1C's digital cores are supported by up to 2MB of MRAM non-volatile memory and up to 2MB of zero wait-state SRAM, with expansion options to external memory via a high-speed OctalSPI interface.

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