Introduction to CPLD

02/02/2020, hardwarebee

When it comes to programmable logic devices or PLDs, you have a number of different options to choose from. From PALs and PLAs, to CPLDs and FPGAs- you can go either way depending on what your individual requirements are in regards to your development project.


What is CPLD?


CPLD stands for Complex Programmable Logic Device. As explained by the name, these are devices that have relatively higher complexity than the likes of PALs, but are less complex than FPGAs or Field Programmable Gate Arrays.


A CPLD is essentially made up of numerous macrocells, each of which consists of disjunctive normal form expressions as well as other logic operations for more specific applications for the purpose of logic implementation. Macrocells can be defined as the functional unit or building block of a Complex Programmable Logic Device which can perform combinational or sequential logic. They contain a combination of AND and OR gates arranged in an array which can be programmed to perform and execute a number of different logic functions.



CPLD Features


There are a number of features that CPLDs possess that makes them similar to other chips and devices in their category, but also sets them apart as a unique solution that is the optimum choice for certain scenarios and situations based on the requirements of the user. Here are some of the most important and defining features of CPLDs:


  • CPLDs have a relatively large number of gates which make the implementation of more complex devices and programs possible. As compared to PALs which normally have gates ranging around a couple of hundred, CPLDs have thousands to over tens of thousands of gates.
  • Special logic functions as well as complex interconnected feedback paths between the macro cells makes CPLD logic much more flexible and modifiable as compared to others.
  • CPLD does not require an external configuration memory and therefore can start operating immediately after the system has been booted up. It is a type of non volatile configuration memory.
  • They employ the use of Electrically Erasable Programmable Read Only Memory (EEPROM).
  • Thanks to the non volatile and non ROM based configuration of the CPLDs, you do not have to worry about any unexpected delays or memory loss. The memory is retained in the circuit even when it has been powered down.
  • CPLDs are also easy to reprogram at a very low cost, reducing your overall costs and expenditure while simultaneously improving the time to market of your products.
  • The integrative and simplistic nature of CPLDs makes them a perfect fit in most kinds of design flows and architecture, posing very little trouble in terms of integration and design adjustments.
  • They have low maintenance costs, proving to be a sound investment in the long run.
  • The non volatile nature of CPLDs makes them a much more secure option as it is next to impossible to steal the stored design. The external memory of the FPGA devices have the potential to expose the IP, although the user can implement encryption techniques to combat this security threat.
  • CPLDs are much better suited for deterministic timing analysis as opposed to FPGAs because of a lesser number of interconnects.


CPLD vs. FPGA- The Differences Between Them


FPGAs can essentially be considered as a more advanced or even more complex version of CPLDs. The primary difference between them is that where CPLDs use a sum of products logic with a sea of gates, FPGA uses internal look up tables or LUTs.


FPGAs can accommodate for millions of gates and also offer much more flexibility thanks to their field modifiable circuit design. Compared to CPLDs, FPGAs are RAM based and lose their memory and data when the power source is removed. This means that you will need to download the data and the configuration from an external memories source to begin its operation again. This can, unfortunately, lead to boot up delays which you will not encounter with the non volatile CPLDs. FPGAs are also more expensive when considered as an overall package.


CPLD VS FPGA Comparison


Between CPLDs and FPGAs, it is wiser to go with the former if you are making simple applications. Go with the latter for more complex applications. CPLDs used to be known for their high power consuming modules, but the latest versions and models have turned it around and have been made much more efficient in terms of power use and dissipation. Thermal management, however, still remains a prominent issue in high complexity and high speed FPGAs. As mentioned before, another problem with FPGAs is that the complex network of interconnected between the various function blocks causes less deterministic signal routing. Because of this, timing scenarios become complicated and implementation tools need to be provided to the user by the vendor to allow for deterministic timing of signals.


In some cases, you may find that both. CPLDs and FPGAs can be used and implemented together for optimum performance and functioning. In these designs, CPLDs are typically dedicated to acting as glue logic and they also boot up the FPGA and the rest of the board.


Choosing a CPLD


You will find a lot of options even within CPLDs when you actually go out to invest in some hardware for your project. When browsing through your options for CPLDs, there are certain salient parameters that you should also keep in the forefront of your mind and use to basically determine what some of the most important features are in your CPLD. your criteria could, of course, vary in accordance with your personal, specific requirements and needs


  • Always check the density of the chip and the number I/Os available.
  • Figure out how great a system performance you require and get a suitable speed grade in your CPLD, otherwise you will end up paying way more than what you actually need and are using in practical application.
  • Go through the power requirements of the device, standby as well as dynamic, and see if it fits within what you can provide.

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