The History of VHDL

17/05/2018, hardwarebee

Since I started designing FPGAs, VHDL was my favorite and preferred programming language. VHDL stands for VHSIC Hardware Description Language and has played a crucial role in the development of the many electronic devices we see today.


The origins of VHDL start in 1983 when the US Department of Defense wanted to document how ASICs that were obtained by third-party suppliers worked in their equipment. So, VHDL was originally used to keep track and document ASIC in microelectronic devices. It was not long before those who were developing VHDL that logic simulators were created to read the VHDL and use it to create a physical implementation of the circuit itself.
A considerable amount of the development of VHDL comes from Ada programming language both in terms of syntax and concept. This helped to avoid a duplication of effort when creating VHDL for military use as they required a considerable amount of syntax for their devices based in Ada. The first version of VHDL was created to match IEEE standards. The result was that a considerable range of data types were incorporated, including logical, character, time, arrays or string, and numerical.


The following is an example of a VHDL 8 bit count:

entity up_counter is
port (
cout :out std_logic_vector (7 downto 0); — Output of the counter
enable :in std_logic; — Enable counting
clk :in std_logic; — Input clock
reset :in std_logic — Input reset
end entity;

architecture rtl of up_counter is
signal count :std_logic_vector (7 downto 0);
process (clk, reset) begin
if (reset = ‘1’) then
count <= (others=>’0′);
elsif (rising_edge(clk)) then
if (enable = ‘1’) then
count <= count + 1;
end if;
end if;
end process;
cout <= count;
end architecture;


However, it was not until the next edition of VHDL that the multi-valued logic or drive strength along with the unknown factors were incorporated. This meant the development of the IEEE Standard 1164 which defined nine-value logic types along with vector versions. This development allowed for multiple driving along modeled bus structures without the conflicts that previous versions could not avoid.


By 1993, the IEEE 1076 was introduced, and the result was more consistent syntax and flexibility so that more printable characters from the ISO-8859-1 could be added. Also, the functionality of the language was expanded thanks to the introduction of several new standards. The result was that even more data could be handled so that devices could become more sophisticated.


Over the next decade, several minor changes were made that helped improve the functionality of the VHDL and the devices that carried the language. This included the use of VITAL and microwave circuit design that extended into new realms of the industry.


By 2006, the Draft 3.0 of VHDL was approved by the VHDL Technical Committee of Accellera. The goal was to maintain its functionality with current and older systems while being expandable into new ones. The new extensions became easier to write and manage the VHDL code with the major changes being the incorporation of child standards into the main 1076 standard.


In addition, the Draft 3.0 also helped extend to a new set of operators, using more flexible syntax, and incorporate VHPI along with PSL or Property Specific Language. The changes themselves proved to be quite useful in synthesizing VHDL code.


Accellera approved the 4.0 Draft version of VHDL in 2008, which addressed the various issues discovered during the trial period of the 3.0 version. Today, the development of VHDL continues at an accelerated pace with many new features sure to be seen.

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