30/12/2021, hardwarebee

A Numerically Controlled Oscillator is an oscillator which the phase or frequency of the waveform is controlled within the design. The Numerically Controlled Oscillator is a programmable linear frequency generator. Lighting control, tone generators, radio-tuning circuits, fluorescent ballasts, and class D audio amplifiers all benefit from Numerically Controlled Oscillators.

To construct a direct digital synthesizer, Numerically Controlled Oscillators are frequently utilized in combination with a digital-to-analog converter (DAC) at the output (DDS). In terms of agility, precision, stability, and dependability, numerically-controlled oscillators outperform other forms of oscillators.

Numerically Controlled Oscillators are used in 3G wireless and software radio systems, digital phase-locked loops, radar systems, drivers for optical or acoustic transmissions, and multilayer FSK/PSK modulators/demodulators, among other uses. Figure 1 depicts the Numerically Controlled Oscillator (NCO) schematic diagram, which shows how each type of NCO works, as well as its physical and electronic components.

Figure 1: Numerically Controlled Oscillator Diagram

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An NCO generally consists of two parts:

- At each clock sample, a phase accumulator (PA) adds a frequency control value to the value kept at its output.
- A phase-to-amplitude converter (PAC) that provides a matching amplitude sample by using the phase accumulator output word (phase word) as an index into a waveform look-up table (LUT). Interpolation is sometimes used in conjunction with the look-up table to improve accuracy and minimize phase error noise. In a software NCO, other ways of translating phase to amplitude, such as mathematical procedures like power series, can be utilized.

The phase accumulator (PA) generates a modulo-2N sawtooth waveform when clocked, which is subsequently transformed to a sampled sinusoid by the phase-to-amplitude converter. If the PAC has a capacity of 2M, the PA output word must be reduced to M bits, as shown in Figure 1. Interpolation can be performed using the shorter bits. The shortening of the phase output word has no influence on frequency accuracy but produces a time-varying periodic phase inaccuracy.

The frequency accuracy relative to the clock frequency is limited only by the precision of the mathematics employed to compute the phase. Because NCOs are phase- and frequency-aware, they may be easily changed to provide phase- or frequency-modulated outputs or offer quadrature outputs by summing at the appropriate node, as shown in Figure 1.

A binary phase accumulator is made up of an N-bit binary adder and a register configuration as shown in Figure 1. Each clock cycle produces a new N-bit output that combines the previous register output with the frequency control word (FCW), which is constant for a given output frequency. The resulting output waveform is a staircase with a Delta F step size, where Delta F is the integer value of the FCW. In certain implementations, the phase output is derived from the register output, resulting in a one clock cycle lag but allowing the adder to run at a higher clock rate.

When the sum of the absolute values of its operands exceeds its capacity (2N1), the adder is intended to overflow. The overflow bit is ignored, resulting in an output word width that is always the same as the input word width. The leftover, referred to as the residual, is put in the register, and the cycle restarts, this time starting at . Because a phase accumulator is a finite state machine, the residual must ultimately revert to at some sample K. The grand repetition rate (GRR) is defined as the interval K divided by the number of repetitions per second.

Where GCD stands for greatest common divisor. The GRR indicates the real periodicity for a given delta F, which can be quite lengthy for a high-resolution NCO. We’re usually more concerned with the operating frequency, which is defined by the average overflow rate, which is provided by

The frequency resolution is defined as the lowest incremental change in frequency that may be achieved by

The phase accumulator can be considered of as a programmed non-integer frequency divider of division ratio , as shown by the equation above.

The sample-domain waveform is generated by the phase-amplitude converter from the PA’s shorter phase output word. A simple PAC could consist of a read-only memory that holds 2M contiguous samples of the desired output waveform, which is often a sinusoid. However, there are a few options for reducing the amount of RAM necessary. This contains a variety of trigonometric expansions, approximations, and techniques based on the quadrature symmetry of sinusoids. Alternatively, the PAC might be created with random-access memory and an arbitrary waveform generator placed into it.

**High Frequency Output:**The output frequency of NCO depends on number of bits e.g. 20-bit size can produce up to 32 MHZ, but the 16-bit version can only generate 500 KHz.**Flexible Output:**The NCO output can be set to a constant duty cycle or to a pulse-frequency mode.**Runs in Low-Power Sleep:**The NCO may work in sleep mode and is independent of the Central Processing Unit (CPU).**Multiple Clock Sources:**As the base clock, the NCO can employ a number of clock sources, both internal and external.**N-bit Timer/counter Functionality:**The NCO may also be used as a general-purpose 20-bit timer or counter in another working mode.

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